Lpc2000

From: "Robert Adsett" <subscriptions@...>
> At 05:08 PM 3/19/05 +0000, jamesasteres wrote:
> >I don't believe the ARM has bit access instructions.  So when the
> >compiler reads the ioset register (or a byte of it?) according to
> >the datasheet you will read what was previously written.  So you
> >risk setting unwanted pins (likely).
>
> That's true, but I don't think it's relevant in this case.  IOSET is
> documented to read back the last values the port was set to
>
> > >       gpio->ioset.reg |= 0x00008000;
>
> Should read the current set value for the port and set the 16'th bit and
> any other bits that are already set.  While
>
> > >       gpio->ioset.pins.p15 = 1;
>
> should logically do the same (after logically doing the appropriate sign
> wrapping which ends up being a null operation).  Anton's earlier question
> about packed structs is probably very much to the point.  It never occurs
> to me that anyone would use packed structs on an architecture that doesn't
> support unaligned access.  Certainly accessing any of the peripheral
> registers on anything other than a word boundary could cause interesting
> results.
>
> Perhaps Leonardo can report back the results of the investigation when
it's
> finished ?
>
> Robert

The GCC compiler tries to optimize the access for bitfields. It combines
multiple sequential set and clear instruction to the same bitfield into one
AND-OR pattern, then determines the minimal necessary width. If that fits
inside one byte, it just changes that single byte, irrespective the width of
the total bitfield.
This is fine for memory (RAM) operations on most processors, even the ARM -
unfortunately  it is deadly to I/O registers that can only be read and
written 32-bits wide.

I've seen a nice example in the NetSilicon NET+ARM BSP, originally written
for ADS using bitfields for the registers, and completely rewritten for all
I/O access to be able to use the GCC compiler.

Regards,
Arie de Muynck