Lpc2000

--- In lpc2000@yahoogroups.com, Robert Adsett <subscriptions@a...> 
wrote:
> At 05:06 PM 4/8/05 +0100, dasbento@a... wrote:
> >I'm using an AD (ADS8325, texas instruments) and i want to 
comunicate
> >with SPI. But i don't know how. The ADS8325 not have an internal 
clock
> >. Therefore, it is necessary to use the SPI clock to make the 
conversions.
> >Any solution to my problem?
> 
> It depends on how it works
> 
> Option 1 - The device only works when connected.  IE the select 
line must 
> be held low during conversion.  In that case the A/D would 
presumably have 
> a period where dummy bytes were clocked in to perform the 
conversion.  I 
> would expect it to be documented that way, something like send 1 
byte 
> configuration followed by two dummy bytes for conversion, On the 
third 
> dummy byte the actual converted data is clocked out.
> 
> Option 2 - The device clocks data in/out during the period the 
select is 
> low but requires a continuing clock when select is high to 
actually perform 
> the conversion.  In that case you could select the device as 
normal when 
> setting up and reading.  Then deselect it and send out dummy bytes 
during 
> the period it is deselected.  In any case you will be sending & 
receiving 
> data while the clock is running.
> 
> Robert

the clock is not needed continuously. it just need to send/receive 3 
bytes to get the data. that's the way it's done in the application 
note I pointed in my precedent post..
description from the datasheet :
"A falling /CS signal initiates the conversion and data transfer.
The first 4.5 to 5.0 clock periods of the conversion cycle are
used to sample the input signal. After the fifth falling DCLOCK
edge, DOUT is enabled and will output a LOW value for one
clock period. For the next 16 DCLOCK periods, DOUT will
output the conversion result, most significant bit first. After
the least significant bit (B0) has been output, subsequent
clocks will repeat the output data, but in a least significant bit
first format.
After the most significant bit (B15) has been repeated, DOUT
will tri-state. Subsequent clocks will have no effect on the
converter. A new conversion is initiated only when CS has
been taken HIGH and returned LOW."