Lpc2000

--- In lpc2000@yahoogroups.com, "Bill Knight" <BillK@t...> wrote:
> Am I missing something here guys (and gals)?  When the FIFO is
> enabled the THRE bit in the Line Status Register is set whenever
> the FIFO can accept additional characters.  So if it were clear,
> isn't that an indication the FIFO is full?

Nope, that isn't the case.  THRE is transmit holding register empty. 
There is the THRE register and then a 16 byte FIFO.  So in my drivers,
I just dump upto 16 bytes in the FIFO and then get an interrupt when
they are all sent.  I guess I could do 17, I'd have to try that.  But
there is no way to tell if it is full, unless you count how many you
put in and keep track of the time and baud rate and all the error that
can occur.  But I find that dumping up to 16 chars in the fifo and
they the next 16 when I get THRE.  Its a little more overhead than
just checking to see if the FIFO is full, but since you can't do that,
this works well enough.

> As for RS-485 transceiver turn-around; the TEMT bit also in the
> Line Status Register, can be used to determine when the stop bit
> of the last character has been transmitted.  Can't that be used
> to control the RS-485 interface?
> 
> Regards
> -Bill Knight
> R O SoftWare &
> http://www.theARMPatch.com