port timing
2005-04-10 by Gennady Palitsky
Maybe someone can help me to clarify the question with GPIO timing.
My intention is to move some data from flash to port0 on LPC2138 as fast as
possible.
I tried few ways using Keil compiler and MCB2130 board.
1. LDR R0, =flash_array ;set flash array pointer
LDR R1,=0xE0028000 ;port0 PIN address (to set 0s and 1s
simultaneously)
LDR R2,[R0],#4 ;load flash word to R2
STR R2,[R1] ;send R2 to port0
LDR R2,[R0],#4 ;next word
STR R2,[R1] ;
....... more words sent
according to the Keil simulator (and ARM7-TDMI-S timing description from the
manual)
loading from flash to register takes 2 cycles, storing at the port address -
3 cycles
Scoping port shows 10 cycles.
2. Doing the same loading data from RAM array gives the same results - 10
cycles (should be 5 according to simulator and manual).
3. Preloading data to registers and moving to port:
LDR R0, =flash_array ;set flash array pointer
LDR R1,=0xE0028000 ;port0 PIN address
LDR R2,[R0],#4
LDR R3,[R0],#4
LDR R4,[R0],#4
.....
STR R2,[R1]
STR R3,[R1]
STR R4,[R1]
...
according to simulator and manual - 2 cycles.
scope - 7 cycles.
=================================
As far as I understand, storing data at the port address adds 5 misterious
cycles with any method, loading data timing is accurate.
I tried different settings, it seems that only one affecting timing is VPB
clock setting - above timing is for PCLK = CCLK.
P.S. I am using in-line assembly (one for all array move), because I can't
get assembly function to work with Keil, but I don't think it matters.
Any idea where do these cycles come from?
Thank you,
Gennady