Am I missing something here guys (and gals)? When the FIFO is enabled the THRE bit in the Line Status Register is set whenever the FIFO can accept additional characters. So if it were clear, isn't that an indication the FIFO is full? As for RS-485 transceiver turn-around; the TEMT bit also in the Line Status Register, can be used to determine when the stop bit of the last character has been transmitted. Can't that be used to control the RS-485 interface? Regards -Bill Knight R O SoftWare & http://www.theARMPatch.com
Message
[lpc2000] Re: Who thinks the PC Compatible UARTs on the LPC are nice ?
2005-04-14 by Bill Knight