Lpc2000

sudip nag ha scritto:

>Hi,
>My requirement is to interface Gigabit ethernet transceiver (>=500Mbps or >=64 mega bytes per second). The data feeding technique is to supply 8 bit parallel data along with a clock that must exceed 64 MHz (64 mega bytes per second). Here I must synchronize each cycle of clock with data byte.  So I need to generate such high clock frequency.
>Please suggest.
>  
>
I think you have to study better your problem. Actually you may transmit 
and receive data burst at gigabit frequency WITHOUT to write data to the 
transceiver at gigabit frequency; to do this also just for some data 
burst you will need  mcu with a clock frequency 10 or moretimes higher 
then 64Mb. You have to choose a chip similar to CS8900 (that works at 
10Mb) and then write the chip data buffers at lower frequency (you have 
to check bus access timings dictated by the transceiver) so your 
transceiver will send and receive bursts of 1 Gb data and your mcu may 
rd/wr at its nominal bus frequency. This means that you will not  e able 
to send continuous data streams at 1Gb but this is normally accepted, 
the only thing to measure is the response time from one packet reception 
to packet handling and you have to manage the transceiver data buffers 
(normally queue buffers) with one or more memory buffers/queue to have a 
longer data burst handled at 1Gb.

> 
>Sudip
>
>Bruce Paterson <bruce@...> wrote:
>
>Without knowing your exact requirements, or whether a common multiple 
>can be found which lets you do all you need, why not run both chips from 
>the same crystal clock circuit ?
>I'm assuming here you mean the data carrier is 100MHz, not the actual 
>data rate (which of course would not be possible from a slower LPC 
>unless you have external FIFO's or something).
>  
>



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