Lpc2000

--- In lpc2000@yahoogroups.com, Robert Adsett <subscriptions@a...> 
wrote:
> Text rearranged for clarity
> 
> At 08:30 AM 6/15/05 +0100, sudip nag wrote:
> >Robert Adsett <subscriptions@a...> wrote:
> >At 01:00 PM 6/14/05 +0100, sudip nag wrote:
> > >Hi,
> > >My requirement is to interface Gigabit ethernet transceiver
> > >=500Mbps or >=64 mega bytes per second). The data feeding
> > >technique is to supply 8 bit parallel data along with a
> > >clock that must exceed 64 MHz(64 mega bytes per second).
> > >Here I must synchronize each cycle of clock with data
> > >byte.  So I need to generate such high clock frequency.
> > >Please suggest.
> >
> >What chip are you using that requires that kind of minimum?
> 
> >I am using TLK1201 from TI for gigabit ethernet interface.
> 
> --
> 
> I think I'm beginning to understand.  I'm stepping into a field
> I'm not familiar with but from the looks of things that is a
> serializer/deserializer only.  It is meant to be part of a
> multi-chip set with another chip providing the MAC and
> protocol functions.
> Trying to hookup a lpc2138 directly to this strikes me as an
> exercise in futility.  It might be possible to add FIFO between
> the two but that's a fair amount of work for little return.
> Why not hookup a 10base-t module?  It would probably still be
> faster than you can manage.
> Robert

Yup, Roberts right.  Your going to need a fifo, or better yet, a 
small FPGA.