Lpc2000

--- In lpc2000@yahoogroups.com, "markevans_1" <markevans@i...> wrote:
> I am finding it a little tricky to calculate how fast this chip can
> actually go for my app. (Instruction cycles and MAM) 
> 
> I was wondering if anyone can tell me how fast it would execute this
> code at 60MHz:
> 
> Read in 16 bits from port1
> store in RAM
> increment pointer
> loop for N times

I'd guess around 13/15 clocks (4.6 MHz / 4.0 MHz) when executing out 
of RAM/flash.

Generally for LPC2000 chips, MAM enabled, MAMTIM=3:

Simple ALU instruction: 1 clock
Load from RAM: 3 clocks
Store to RAM: 2 clocks
Load constant from flash: 3 or 5 clocks, depending on MAM hit/miss
Load from VPB peripheral (GPIO, timer etc.): 8 clocks
Store to VPB peripheral: 7 clocks
Jump (executing from RAM): 3 clocks
Jump (executing from flash): Normally 5 clocks, sometimes 3 clocks 
with short backward jumps
Skipped conditional instruction: 1 clock

The speed of loads/stores to the VIC is somewhere between RAM and VPB 
timings, I don't remember my exact measurements.


> I basically want to buffer data as fast as possible in bursts.
> Ideally at 20MHz.

I don't think this is possible, even with the coming LPC214x.  If a 
GPIO load takes 3 clocks in the new chips (philips_apps: do they?) 
and a RAM store takes 2, you will end up with at least 5 clocks, or 
12 MHz.  This is when you completely unroll your loop so there is no 
loop overhead.

For very short bursts, you can:

  ; r0 = IOPIN0
  ldr r1, [r0]
  ldr r2, [r0]
  ldr r3, [r0]
  :   :   :
  ldr r14, [r0]

and then store the registers afterwards.


> How much faster would it execute in RAM. 
> Could I make it faster by using an infinite loop and using a timer 
> to 'break out' of the loop.

Not much, you could save one clock for decrementing the loop 
counter.  You will gain more by unrolling the loop.  If you require 
completely uniform sampling times, you have to unroll the loop 
completely:

  ; r0 = IOPIN0
  ; r1 = RAM pointer
  ldr r2, [r0]
  strh r2, [r1, #0]
  ldr r2, [r0]
  strh r2, [r1, #2]
  ldr r2, [r0]
  strh r2, [r1, #4]
  ldr r2, [r0]
  strh r2, [r1, #6]
  ; etc etc

Karl Olsen