Lpc2000

--- In lpc2000@yahoogroups.com, "vajper0" <ph@w...> wrote:
> I'm writing a driver for UART1 on a LPC2138. So far most things seems
> to work (considering the crappy hardware capabilities). My current
> problem is that I loose interrupts when receiving data.
> 
> I run the UART in 115200bps and my ISR takes care of all IRQs except
> the modem status ones that are not enabled. If I send a block of a
> couple of hundreds characters, sometimes one RDA IRQ is lost. I know
> this because the missing data always are the size of the Rx trigger
level.
> 
> The ISR reads the U1IIR once in the beginning, compares the register
> data to the different IRQ types in priority order. The first matching
> type is handled (and the IRQ resetted), the U1IIR is then read again
> and so on. When no more pending IRQs, the ISR is exited. When a 
> 
> Am I missing something essential?

Hello,

  I use a 2132, but the initial development was done on a 2138
evaluation board from keil, the M something 2130.
  I have interrupt comm at 115200, and do not seem to miss any.
  Do you enable the FIFO? If so, do you empty the FIFO each RX data
IRQ? If so, do you also enable the TIMEOUT IRQ and collect the
remainder data (less than one FIFO).
  In my application, I set the FIFO to 14 bytes (the maximum).
  In the IRQ I loop until the IIR reads no pending.
  As this application also uses rs485 half duplex, I thought the TEMPT
 (transmitter empty) bit could generate an interrupt, and the
direction could be dropped changed back to listen. But it does not, so
on tx complete, a flag is set, and the timer IRQ looks for the TEMPT
bit and does it's thing.
  A similar thing to detect when the line is available, each RX IRQ,
set the 'receiving' flag, and mark the time of the reception. When 'a
certain amount of time has passed without receiving characters' could
be a clear channel.
  A slight modification of this was, when the TIMEOUT interrupt
occurs, this indicates clear channel of at least '3.5' character
times, and this can be used. Well infact it is used, but the other
method also remains, as what if the last block of received data is
exactly one FIFO long, then no TIMEOUT IRQ will come, and so the timer
method of clear channel detection is used. This is controlled by a
single flag and a time of last reception value.

  Anything else?
  Being at home now, the code is not available, but I could send
something tomorrow when I get to work. But really, it's not that
difficult.

Dave