Hello to you all, doing my first post here... The Philips LPC 21xx user manual carefully explains about pclk <-> cclk relation and vpb divider, but doesn't say whether there is any upper limit on pclk... Does anyone know if pclk can safely run at same speed as cclk (vpb divider=1), even if cclk is set at max, that is 60mhz on the LPC 2119 version I am using? Kind Regards
Message
vpb divider when cpu clock speed is at max...
2005-08-05 by arkeryd