Yahoo Groups archive

Lpc2000

Index last updated: 2026-04-28 23:31 UTC

Message

Re: vpb divider when cpu clock speed is at max...

2005-08-05 by philips_apps

--- In lpc2000@yahoogroups.com, "arkeryd" <arkeryd@y...> wrote:
> Hello to you all, doing my first post here...
> 
> The Philips LPC 21xx user manual carefully explains about pclk <->
> cclk relation and vpb divider, but doesn't say whether there is any
> upper limit on pclk...
> 
> Does anyone know if pclk can safely run at same speed as cclk (vpb
> divider=1), even if cclk is set at max, that is 60mhz on the LPC 
2119
> version I am using?
> 
> Kind Regards

Hello arkeryd@…

There is no upper limit for the pclk frequency in the currently 
available LPC2000 microcontrollers. Regardless of the cclk value, 
you can safely have your pclk = cclk (VPBDIV = 0x01) and have 
pclk=60MHz. The reason why the pclk = cclk/4 at reset is to reduce 
an overall power consumption of the device.

Regards,

Philips Apps Team

Attachments

Move to quarantaine

This moves the raw source file on disk only. The archive index is not changed automatically, so you still need to run a manual refresh afterward.