Lpc2000

Hi Charles,

Thanks for the interesting comments.

> One argument against leaving things in SVC mode is that you 
> cannot then do SWIs, since SWIs need to switch to SVC mode to 
> execute.

Is that really true? Since an SWI is generated from an instruction,
you could push the contents of the link register, then call
an SWI, and then restore the link register? So you could run the
RTOS from SVC and still use SWIs.

> > Any comments on the store/load-multiple instructions and
> > issues with their use?
> 
> STM and LDM provide nice compact data shuffling, but they can push out 
> interrupt latency since the whole instruction must finish before the 
> interrupt can be serviced. For that reason, some compilers allow for 
> controlling the maximum number of registers save/restored by an ldm/stm.

Good point. But in the case of exception handler prolog and epilog
code, you'd ideally use those instructions. Even when interrupt
nesting, its nice to save full context before enabling interrupts of 
higher priority, ditto for the restore sequence.

Dave