Lpc2000

Hey Robert,
> 
> It was probably my post you saw David.  And I haven't rolled 
> Bruce's stuff 
> in yet.  I've been distracted with clients work.  It is high on my todo 
> list as well as a way to allow contributed code out in the wild more 
> quickly especially drivers so they don't get stalled like this.  It'll 
> probably be simple but I have to actually get it done.
> 
> I haven't explicitly addressed re-entrancy but I did try to structure 
> things so it could be taken care of in the future.  As far as how 
> successful that's been well the proof of the pudding will be in 
> the eating.

If I get a chance to look at it, and can either contribute bug
fixes, or new drivers, I will.

I haven't looked at your driver layer, but out of interest, what
did you base it on? I've got an Altera Stratix II DSP kit, and
the Altera NIOS II development software comes with a nice driver 
layer for newlib and their HAL, which is then interfaced to uCOS-II.
There is also an eCOS port for the NIOS II processor, but I'm not 
sure if the HAL used there is identical. I've only just started
tinkering with that kit - problem was you need an FPGA implementation
of the processor before you can even start, and it was
missing from their 1.0.0 CD! I've just received the 1.1.0 CD and
the 'standard' processor reference design is there.

Seems like newlib has a new driver layer ported to every
time someone decides it needs one. I just want one layer
thats fairly processor agnositic (ie a HAL) so that I can run
similar application tests on the various processor to
see what meets my needs.

Thanks!
Dave