Michael Johnson wrote: >A wiggler will do a maximum of 400kHz - I can't remember if we have LPC >boards that we've had to put a clock divider on to make things reliable >- so 500kHz may be too fast. Could there be a program in the flash that >is causing the problem - try erasing the flash using the ISP. > > > I was thinking the same thing, I saw the same prob with Abatron BDI2000 + LPC2138. The processor would give data aborts via the JTAG until I erased the Flash. TomW >Regards >Michael > > > >>Hi Michael, >> >>Yes. I can set it anywhere from 500kHz to 10Mhz. I've been using it >>at 500kHZ and 1 Mhz. I should mention I'm using ADS 1.2. >> >>Thanks, >>Mark >> >> >> >> >> >>>Hi Mark, >>> >>>Can you divide the JTAG clock frequency? >>> >>>Regards >>>Michael >>> >>> >>> >>> >> >> >> >> >> >> >>Yahoo! Groups Links >> >> >> >> >> >> >> >> >> >> > > > > > >Yahoo! Groups Links > > > > > > > > -- Tom Walsh - WN3L - Embedded Systems Consultant http://openhardware.net, http://cyberiansoftware.com "Windows? No thanks, I have work to do..." ----------------------------------------------------
Message
Re: [lpc2000] Re: JTAG Debugger
2005-10-26 by Tom Walsh