Lpc2000

Hello all,

a hardware related question: the LPC2210 has a dual power supply: 1.8V
core voltage and 3.3V for the I/O.  
Is the power-on (and power-off) sequence of these 2 voltages critical?
Will a 1.8V regulator behind the 3.3V regulator do the job? The 1.8V
will be a little bit later during power-on.

We bought a development board from Phytec and that board contains a
bunch of components to adjust the power-on sequence.  The datasheet of
the LPC2210 does not mention any potential problems or limits between
the 2 supply voltages.  So I wonder why Phytec did go through the
troubles of placing the extra components...

Regards,
Pieter Verstraelen






[Non-text portions of this message have been removed]

Pieter Verstraelen wrote:

>Hello all,
>
>a hardware related question: the LPC2210 has a dual power supply: 1.8V
>core voltage and 3.3V for the I/O.  
>Is the power-on (and power-off) sequence of these 2 voltages critical?
>Will a 1.8V regulator behind the 3.3V regulator do the job? The 1.8V
>will be a little bit later during power-on.
>
>  
>
 From what I'd read from the LPC2106 datasheet, there is no spec for 
cycling those two voltages. However, if you read the Notes (note 3) 
under the "Static Charactoristics" it says that application of a 5v 
signal to a tolerant pin is to be done with 3.3v supply present.

So, that infers that cycling of the 3.3v vs. 5v supplies is in order.  
Normally, you can accomplish this by feeding the 3.3v regulator from the 
5volt supply.   Then, ensure that no large capacitors within the 3.3v 
supply circuit would delay the rise / activation of the 3.3v output.  
Keeping capacitance to a reasonable level would accomplish this.  The 
only time that you could run into a problem there is if you use 
independant supplies for 3.3v and 5v.

I use a 3.3v regulator feeding a seperate 1.8v regulator.  So, the 1.8v 
stabilizes before the 3.3v and the 3.3v dies before the 1.8v.  The 1.8v 
is feeding the ARM core and the 3.3v is for the external logic 
interface. Following logical flow of the powerup / power down sequencing 
of supplies would be that the 1.8v core would be active before and after 
the 3.3v stabilization / decay.  I would suspect, that internally 
reverse biasing the 1.8v core via the 3.3v could be a "bad thing"?  :-P



>We bought a development board from Phytec and that board contains a
>bunch of components to adjust the power-on sequence.  The datasheet of
>the LPC2210 does not mention any potential problems or limits between
>the 2 supply voltages.  So I wonder why Phytec did go through the
>troubles of placing the extra components...
>
>  
>
It sounds like they designed an "end-all-be-all" solution that 
"one-size-fits-all".
Overdesign can be such a seductive thing...  ;-)

Regards,

TomW



-- 
Tom Walsh - WN3L - Embedded Systems Consultant
http://openhardware.net, http://cyberiansoftware.com
"Windows? No thanks, I have work to do..."
----------------------------------------------------

At 02:29 PM 1/7/06 -0500, Tom Walsh wrote:
>Pieter Verstraelen wrote:
>
> >Hello all,
> >
> >a hardware related question: the LPC2210 has a dual power supply: 1.8V
> >core voltage and 3.3V for the I/O.
> >Is the power-on (and power-off) sequence of these 2 voltages critical?
> >Will a 1.8V regulator behind the 3.3V regulator do the job? The 1.8V
> >will be a little bit later during power-on.
> >

<snip>

>I use a 3.3v regulator feeding a seperate 1.8v regulator.  So, the 1.8v
>stabilizes before the 3.3v and the 3.3v dies before the 1.8v.  The 1.8v
>is feeding the ARM core and the 3.3v is for the external logic
>interface. Following logical flow of the powerup / power down sequencing
>of supplies would be that the 1.8v core would be active before and after
>the 3.3v stabilization / decay.  I would suspect, that internally
>reverse biasing the 1.8v core via the 3.3v could be a "bad thing"?  :-P

Experimentally I've powered the 2106 with large delays (on the order of a 
second or so)in both directions w/o any observable effect.  Both bring up 
the 3V3 before and after the 1V8 rail.  At one point philips_apps stated 
that there were no sequencing issues and that appears to be borne out in 
practice so far.

I wouldn't deliberating bring them up on widely different timescales in 
production but I also would spend effort sequencing them.  I would, 
however, put in a 'proper' power monitor chip on the reset line.

There doesn't appear to be any sequencing issues at all.  I've even run the 
1V8 at 5V accidentally w/o observable effect although I wouldn't want to 
use that chip as a production chip.

Robert

" 'Freedom' has no meaning of itself.  There are always restrictions,   be 
they legal, genetic, or physical.  If you don't believe me, try to chew a 
radio signal. "  -- Kelvin Throop, III
http://www.aeolusdevelopment.com/

At 06:10 PM 1/7/06 -0500, Robert Adsett wrote:
>At 02:29 PM 1/7/06 -0500, Tom Walsh wrote:
> >Pieter Verstraelen wrote:
> >
> > >Hello all,
> > >
> > >a hardware related question: the LPC2210 has a dual power supply: 1.8V
> > >core voltage and 3.3V for the I/O.
> > >Is the power-on (and power-off) sequence of these 2 voltages critical?
> > >Will a 1.8V regulator behind the 3.3V regulator do the job? The 1.8V
> > >will be a little bit later during power-on.
> > >
>
><snip>
>
> >I use a 3.3v regulator feeding a seperate 1.8v regulator.  So, the 1.8v
> >stabilizes before the 3.3v and the 3.3v dies before the 1.8v.  The 1.8v
> >is feeding the ARM core and the 3.3v is for the external logic
> >interface. Following logical flow of the powerup / power down sequencing
> >of supplies would be that the 1.8v core would be active before and after
> >the 3.3v stabilization / decay.  I would suspect, that internally
> >reverse biasing the 1.8v core via the 3.3v could be a "bad thing"?  :-P
>
>Experimentally I've powered the 2106 with large delays (on the order of a
>second or so)in both directions w/o any observable effect.  Both bring up
>the 3V3 before and after the 1V8 rail.  At one point philips_apps stated
>that there were no sequencing issues and that appears to be borne out in
>practice so far.
>
>I wouldn't deliberating bring them up on widely different timescales in
>production but I also would spend effort sequencing them.  I would,

Oops that's 'wouldn't spend effort sequencing them'

>however, put in a 'proper' power monitor chip on the reset line.
>
>There doesn't appear to be any sequencing issues at all.  I've even run the
>1V8 at 5V accidentally w/o observable effect although I wouldn't want to
>use that chip as a production chip.
>
>Robert
>
>" 'Freedom' has no meaning of itself.  There are always restrictions,   be
>they legal, genetic, or physical.  If you don't believe me, try to chew a
>radio signal. "  -- Kelvin Throop, III
>http://www.aeolusdevelopment.com/
>
>
>
>
>Yahoo! Groups Links
>
>
>
>

" 'Freedom' has no meaning of itself.  There are always restrictions,   be 
they legal, genetic, or physical.  If you don't believe me, try to chew a 
radio signal. "  -- Kelvin Throop, III
http://www.aeolusdevelopment.com/