Lpc2000

At 11:57 PM 2/6/06 +0000, you wrote:
>--- In lpc2000@yahoogroups.com, "Guillermo Prandi"
><yahoo.messenger@...> wrote:
>
>Hi, I wonder if anyone has seen this before.
>
>While developing the firmware for my LPC2138-featured board, I noticed
>that the bootloader is not always invoked after a reset with P0.14 low.
>Even when the bootloader is not invoked, the device still responds to
>reset.

Any chance you've triggered a watchdog or some such?

Robert

" 'Freedom' has no meaning of itself.  There are always restrictions,   be 
they legal, genetic, or physical.  If you don't believe me, try to chew a 
radio signal. "  -- Kelvin Throop, III
http://www.aeolusdevelopment.com/

> Any chance you've triggered a watchdog or some such?

Well, yes... the program might have triggered the watchdog but... why 
should it matter after the reset pin being low for half a second?

Guille

--- In lpc2000@yahoogroups.com, Robert Adsett <subscriptions@...> 
wrote:
>
> At 11:57 PM 2/6/06 +0000, you wrote:
> >--- In lpc2000@yahoogroups.com, "Guillermo Prandi"
> ><yahoo.messenger@> wrote:
> >
> >Hi, I wonder if anyone has seen this before.
> >
> >While developing the firmware for my LPC2138-featured board, I 
noticed
> >that the bootloader is not always invoked after a reset with P0.14 
low.
> >Even when the bootloader is not invoked, the device still responds 
to
> >reset.
> 
> Any chance you've triggered a watchdog or some such?
> 
> Robert
> 
> " 'Freedom' has no meaning of itself.  There are always 
restrictions,   be 
> they legal, genetic, or physical.  If you don't believe me, try to 
chew a 

> radio signal. "  -- Kelvin Throop, III
> http://www.aeolusdevelopment.com/
>

At 10:23 AM 2/7/06 +0000, Guillermo Prandi wrote:
> > Any chance you've triggered a watchdog or some such?
>
>Well, yes... the program might have triggered the watchdog but... why
>should it matter after the reset pin being low for half a second?

Truthfully, I don't know.  I only raise the possibility because the User 
Manual indicates there is an internal flag set by the watchdog so that if 
it is the source of the interrupt the ISP pin is ignored.  If that flag is 
not cleared somehow then any subsequent reset could also ignore the 
pin.  Off hand I wouldn't expect the length of the reset pulse to make any 
difference on whether it entered ISP mode or not.

If you have an extra pin I'd set it on startup to indicate the startup 
source.  I seem to remember you can tell that on startup, I hope I'm not 
confusing the LPC with a different processor.

Robert

" 'Freedom' has no meaning of itself.  There are always restrictions,   be 
they legal, genetic, or physical.  If you don't believe me, try to chew a 
radio signal. "  -- Kelvin Throop, III
http://www.aeolusdevelopment.com/

Robert Adsett wrote:

>At 10:23 AM 2/7/06 +0000, Guillermo Prandi wrote:
>  
>
>>>Any chance you've triggered a watchdog or some such?
>>>      
>>>
>>Well, yes... the program might have triggered the watchdog but... why
>>should it matter after the reset pin being low for half a second?
>>    
>>
>
>Truthfully, I don't know.  I only raise the possibility because the User 
>Manual indicates there is an internal flag set by the watchdog so that if 
>it is the source of the interrupt the ISP pin is ignored.  If that flag is 
>not cleared somehow then any subsequent reset could also ignore the 
>pin.  Off hand I wouldn't expect the length of the reset pulse to make any 
>difference on whether it entered ISP mode or not.
>
>  
>
I'd noticed something like that as well.  I played with the watchdog a 
little and found that it didn't work as expected.  IIRC, I had to do a 
powerdown to get the system to run again.  I didn't look further than 
that, as I decided this watchdog thing was going to take some serious 
thought.  It doesn't work as a simple LTC590 monitor...

Probably over-engineered.

Tomw


>If you have an extra pin I'd set it on startup to indicate the startup 
>source.  I seem to remember you can tell that on startup, I hope I'm not 
>confusing the LPC with a different processor.
>
>Robert
>
>" 'Freedom' has no meaning of itself.  There are always restrictions,   be 
>they legal, genetic, or physical.  If you don't believe me, try to chew a 
>radio signal. "  -- Kelvin Throop, III
>http://www.aeolusdevelopment.com/
>
>
>
> 
>Yahoo! Groups Links
>
>
>
> 
>
>
>  
>


-- 
Tom Walsh - WN3L - Embedded Systems Consultant
http://openhardware.net, http://cyberiansoftware.com
"Windows? No thanks, I have work to do..."
----------------------------------------------------

Yes, with LPC you can tell the source of the startup, but in this 
case the startup is hardware-originated, so I am pretty sure it is 
hardware. You suggest that the processor doesn't clear the proper 
bits for the bootloader to tell?

Guille

--- In lpc2000@yahoogroups.com, Robert Adsett <subscriptions@...> 
wrote:
>
> At 10:23 AM 2/7/06 +0000, Guillermo Prandi wrote:
> > > Any chance you've triggered a watchdog or some such?
> >
> >Well, yes... the program might have triggered the watchdog but... 
why
> >should it matter after the reset pin being low for half a second?
> 
> Truthfully, I don't know.  I only raise the possibility because the 
User 
> Manual indicates there is an internal flag set by the watchdog so 
that if 
> it is the source of the interrupt the ISP pin is ignored.  If that 
flag is 
> not cleared somehow then any subsequent reset could also ignore the 
> pin.  Off hand I wouldn't expect the length of the reset pulse to 
make any 
> difference on whether it entered ISP mode or not.
> 
> If you have an extra pin I'd set it on startup to indicate the 
startup 
> source.  I seem to remember you can tell that on startup, I hope 
I'm not 
> confusing the LPC with a different processor.
> 
> Robert
> 
> " 'Freedom' has no meaning of itself.  There are always 
restrictions,   be 
> they legal, genetic, or physical.  If you don't believe me, try to 
chew a 

> radio signal. "  -- Kelvin Throop, III
> http://www.aeolusdevelopment.com/
>

--- In lpc2000@yahoogroups.com, "Guillermo Prandi"
<yahoo.messenger@...> wrote:
>
> Yes, with LPC you can tell the source of the startup, but in this 
> case the startup is hardware-originated, so I am pretty sure it is 
> hardware. You suggest that the processor doesn't clear the proper 
> bits for the bootloader to tell?

I'm suggesting it needs to be verified one way or the other. 
Certainly the observed behaviour suggests that as a possibility.

There are, of course, many ways to implement this reset source
recognition but one way is to write a bit into a register for
occurances other than power on.  These bits are then never cleared and
so are always set the way they were last set.  A power on
automatically clears the register.  

ISTR a Motorola micro that behaved in that fashion, there was an
explicit line in the user manual saying that the reset source register
should be cleared in order to properly recognize the source of
subsequent resets.  Consider that an incentive to throughly read the
user manual, miss one line and spend days tracking down what seems to
be odd behaviour ;)

 Robert
 
 " 'Freedom' has no meaning of itself.  There are always restrictions,
  be 
 they legal, genetic, or physical.  If you don't believe me, try to 
chew a 
 radio signal. "  -- Kelvin Throop, III
 http://www.aeolusdevelopment.com/

Thanks, Richard. I'll try to dig deeper on it.

Guille

--- In lpc2000@yahoogroups.com, "robertadsett" <subscriptions@...> 
wrote:
>
> --- In lpc2000@yahoogroups.com, "Guillermo Prandi"
> <yahoo.messenger@> wrote:
> >
> > Yes, with LPC you can tell the source of the startup, but in this 
> > case the startup is hardware-originated, so I am pretty sure it 
is 
> > hardware. You suggest that the processor doesn't clear the proper 
> > bits for the bootloader to tell?
> 
> I'm suggesting it needs to be verified one way or the other. 
> Certainly the observed behaviour suggests that as a possibility.
> 
> There are, of course, many ways to implement this reset source
> recognition but one way is to write a bit into a register for
> occurances other than power on.  These bits are then never cleared 
and
> so are always set the way they were last set.  A power on
> automatically clears the register.  
> 
> ISTR a Motorola micro that behaved in that fashion, there was an
> explicit line in the user manual saying that the reset source 
register
> should be cleared in order to properly recognize the source of
> subsequent resets.  Consider that an incentive to throughly read the
> user manual, miss one line and spend days tracking down what seems 
to
> be odd behaviour ;)
> 
>  Robert
>  
>  " 'Freedom' has no meaning of itself.  There are always 
restrictions,

>   be 
>  they legal, genetic, or physical.  If you don't believe me, try to 
> chew a 
>  radio signal. "  -- Kelvin Throop, III
>  http://www.aeolusdevelopment.com/
>