Lpc2000

Hello,
I'm still waiting to get my demo board and wanted to ask if anyone 
had checked I/O speed for toggling a pin, as in emulating a 
nonstandard SPI-like buss instead of using the peripheral on chip.

I'm just wondering what to expect for latency and max speed.

Thanks,
-Lee

At 08:58 PM 3/30/04 +0000, you wrote:
>Hello,
>I'm still waiting to get my demo board and wanted to ask if anyone
>had checked I/O speed for toggling a pin, as in emulating a
>nonstandard SPI-like buss instead of using the peripheral on chip.
>
>I'm just wondering what to expect for latency and max speed.

See http://groups.yahoo.com/group/lpc2000/message/37
also check it's precursors and followups for more information.


Robert

" 'Freedom' has no meaning of itself.  There are always restrictions,
be they legal, genetic, or physical.  If you don't believe me, try to
chew a radio signal. "

                         Kelvin Throop, III

I was hoping to achieve faster speeds, but since the GPIO is pretty 
slow and I got pretty much the same speeds as mentioned in message 37 
(ie. somewhere around 150ns per bit, 300ns per cycle). I've since 
decided to go with a CPLD for faster clocking (ie. LPC210x writes 8 
bits at a time into a CPLD which then clocks the data out faster).

The bottleneck is the GPIO which seems to use many clocks to effect a 
write. Thus, fiddling the VPB clock changes the performance 
significantly but the MAM does not has as much impact.

-- Charles

Very cool! that's what I wanted to see. I'll search to see if the 
buad rate change was tracked down. Thanks!!! 
-Lee

> 
> See http://groups.yahoo.com/group/lpc2000/message/37
> also check it's precursors and followups for more information.
> 
> 
> Robert
> 
> " 'Freedom' has no meaning of itself.  There are always 
restrictions,
> be they legal, genetic, or physical.  If you don't believe me, try 
to

> chew a radio signal. "
> 
>                          Kelvin Throop, III