Lpc2000

I've been fighting trying to get this damn SPI module to work with 
some ADC's and DAC's.  These use 16, 24, and 32 bit word sizes.

As far as I can tell the SPI module only works with Byte data!  I was 
not able to make it work at all with these ADCs/DACs.  The SPIF flag 
pops up based on 8 bit data.  What good is any of this SPI register 
setup if the word size is not 8 bits?

Finally I shut the SPI module down and reprog the pins for GPIO.  I 
wrote my own manual SPI control routines.  My ADCs and DACs started 
working the first time!  Very easy, stupid simple.

I don't get it.  There are all these complex registers and flags 
trying to track errors and status in this SPI module, but it only 
supports 8 bit data!  Geez, they have plenty of extra bits around 
where they could have used a few to define a word size.

I just can't understand what the point is of having a 32bit MCU and 
crippling the legs of the SPI module to 8 bits.  Why????

Maybe I missed something, but I don't see anyway to use this SPI 
module unless all your data is 8 bits.  But the ADCs and DACs don't 
work that way.  They want all the bits shifted out contiguous: 16, 
24, 32, whatever.

Chris.

Hi Chris,
  The only LPC part that does other data sizes other then 8 bits is
the LPC2138 which has a SPI and SSP unit that has data sizes from 4 to
16 bits. That was the main reason why I moved over to this part.

regards,
Charles


--- In lpc2000@yahoogroups.com, "sig5534" <sig5534@h...> wrote:

> 
> I've been fighting trying to get this damn SPI module to work with 
> some ADC's and DAC's.  These use 16, 24, and 32 bit word sizes.
> 
> As far as I can tell the SPI module only works with Byte data!  I was 
> not able to make it work at all with these ADCs/DACs.  The SPIF flag 
> pops up based on 8 bit data.  What good is any of this SPI register 
> setup if the word size is not 8 bits?
> 
> Finally I shut the SPI module down and reprog the pins for GPIO.  I 
> wrote my own manual SPI control routines.  My ADCs and DACs started 
> working the first time!  Very easy, stupid simple.
> 
> I don't get it.  There are all these complex registers and flags 
> trying to track errors and status in this SPI module, but it only 
> supports 8 bit data!  Geez, they have plenty of extra bits around 
> where they could have used a few to define a word size.
> 
> I just can't understand what the point is of having a 32bit MCU and 
> crippling the legs of the SPI module to 8 bits.  Why????
> 
> Maybe I missed something, but I don't see anyway to use this SPI 
> module unless all your data is 8 bits.  But the ADCs and DACs don't 
> work that way.  They want all the bits shifted out contiguous: 16, 
> 24, 32, whatever.
> 
> Chris.

At 03:18 PM 1/16/05 +0000, you wrote:
>As far as I can tell the SPI module only works with Byte data!  I was
>not able to make it work at all with these ADCs/DACs.  The SPIF flag
>pops up based on 8 bit data.  What good is any of this SPI register
>setup if the word size is not 8 bits?

So do most SPI peripherals.  Surely in this case you just read and write 
multiples of 8 bits.  The peripheral won't be able to distinguish between 
two writes of 8 bits and one write of 16 bits.  Even if there were a 
significant pause between them there shouldn't be an issue, that's what the 
clock is for.

Robert

>Maybe I missed something, but I don't see anyway to use this SPI
>module unless all your data is 8 bits.  But the ADCs and DACs don't
>work that way.  They want all the bits shifted out contiguous: 16,
>24, 32, whatever.

I think you must be missing something, why can't you send them out in a 
contiguous fashion using the SPI?  If you were trying to send 13 bits I 
could understand the problem but I haven't seen an SPI peripheral in some 
time that didn't use a multiple of 8 bits (too many micros only use 8 bit 
shift registers for serial I/O).

Robert


" 'Freedom' has no meaning of itself.  There are always restrictions,
be they legal, genetic, or physical.  If you don't believe me, try to
chew a radio signal. "

                         Kelvin Throop, III

>   The only LPC part that does other data sizes other then 8 bits is
> the LPC2138 which has a SPI and SSP unit that has data sizes from 4 
to
> 16 bits. That was the main reason why I moved over to this part.

That's still lame.  It should be setup to handle any 8-32 bit word 
sizes.  There are lots of ADCs/DACs that do 24 and 32 bits.

But I do not understand why you would change parts for that reason.  
Just turn the SPI off and write your own routines.  It is far easier 
than using that SPI module.  Took me 30 minutes and about 60 lines of 
code.  Really simple.  If you want me to post it let me know.

Chris.

> So do most SPI peripherals.  
> Surely ... you just read and write multiples of 8 bits.

Nope.  Just try it.  May work for some ADCs/DACs but certainly will 
not work for all of them.  Multiple Writes may work, but I could 
never get multiple Reads to work.  The interlocking nature of the 
status flag logic seems to get confused.  Appears to be pretty much 
limited to handling only 8 bit contiguous data.

If they changed this on the other CPU versions to handle 16b words, 
well I guess that tells you right there that this SPI must only do 8b 
data.

Chris.

Hi Chris,

   In a word, speed. I need the 2.xxMHz clock rate and a line toggle
routine will not cut it. Also I want as much CPU time as I can get
without having to wait there for slower SPI transfers. My SPI ISR
routine pulls all the data from a buffer which includes the chip
select wanted (which also determines the clock speed and data and
clock polarity), the data to send (including size). All data coming in
is also buffer with a marker of which chip select it came from. 

regards,
Charles


--- In lpc2000@yahoogroups.com, "sig5534" <sig5534@h...> wrote:

> 
> >   The only LPC part that does other data sizes other then 8 bits is
> > the LPC2138 which has a SPI and SSP unit that has data sizes from 4 
> to
> > 16 bits. That was the main reason why I moved over to this part.
> 
> That's still lame.  It should be setup to handle any 8-32 bit word 
> sizes.  There are lots of ADCs/DACs that do 24 and 32 bits.
> 
> But I do not understand why you would change parts for that reason.  
> Just turn the SPI off and write your own routines.  It is far easier 
> than using that SPI module.  Took me 30 minutes and about 60 lines of 
> code.  Really simple.  If you want me to post it let me know.
> 
> Chris.

At 12:03 AM 1/17/05 +0000, you wrote:


> > So do most SPI peripherals.
> > Surely ... you just read and write multiples of 8 bits.
>
>Nope.  Just try it.  May work for some ADCs/DACs but certainly will
>not work for all of them.  Multiple Writes may work, but I could
>never get multiple Reads to work.  The interlocking nature of the
>status flag logic seems to get confused.  Appears to be pretty much
>limited to handling only 8 bit contiguous data.

I'm about to actually.  I don't know of any SPI peripheral (other than bare 
logic gates) that uses single 8 bit values.

You did note the SPI errata?

>If they changed this on the other CPU versions to handle 16b words,
>well I guess that tells you right there that this SPI must only do 8b
>data.

Not really.  If that was the case I don't think they would have kept the 
original.

I'll let you know what I find.

Robert

" 'Freedom' has no meaning of itself.  There are always restrictions,
be they legal, genetic, or physical.  If you don't believe me, try to
chew a radio signal. "

                         Kelvin Throop, III

Will this mean that we are not able
to make simple use of SPI-based serial data flash
for file storage and SPI based Ethernet MAC/PHY's
like the one coming up from microchip by simple
connecting these devices to the SPI bus adding
additional dedicated select pins from Port 0
of the LPC210x family.

I agree I don't know of any device that is just
8 Bit. SPI is a serial protocol and as such I should
be able to handle any word-length in a way.

Markus

Robert Adsett schrieb:

>At 12:03 AM 1/17/05 +0000, you wrote:
>
>
>  
>
>>>So do most SPI peripherals.
>>>Surely ... you just read and write multiples of 8 bits.
>>>      
>>>
>>Nope.  Just try it.  May work for some ADCs/DACs but certainly will
>>not work for all of them.  Multiple Writes may work, but I could
>>never get multiple Reads to work.  The interlocking nature of the
>>status flag logic seems to get confused.  Appears to be pretty much
>>limited to handling only 8 bit contiguous data.
>>    
>>
>
>I'm about to actually.  I don't know of any SPI peripheral (other than bare 
>logic gates) that uses single 8 bit values.
>
>You did note the SPI errata?
>
>  
>
>>If they changed this on the other CPU versions to handle 16b words,
>>well I guess that tells you right there that this SPI must only do 8b
>>data.
>>    
>>
>
>Not really.  If that was the case I don't think they would have kept the 
>original.
>
>I'll let you know what I find.
>
>Robert
>
>" 'Freedom' has no meaning of itself.  There are always restrictions,
>be they legal, genetic, or physical.  If you don't believe me, try to
>chew a radio signal. "
>
>                         Kelvin Throop, III
>
>
>
> 
>Yahoo! Groups Links
>
>
>
> 
>
>
>
>
>  
>

-- 
Mit freundlichen Gr\ufffdssen
Markus Meng

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At 09:33 AM 1/17/05 +0100, you wrote:
>Will this mean that we are not able
>to make simple use of SPI-based serial data flash
>for file storage and SPI based Ethernet MAC/PHY's
>like the one coming up from microchip by simple
>connecting these devices to the SPI bus adding
>additional dedicated select pins from Port 0
>of the LPC210x family.

That's how I read the OP's complaint.  And others have certainly attempted 
to interface serial non volatile memory and this is the first complaint 
I've heard that it would be fundamentally impossible.

As I said I'm about to delve into SPI anyway so I'll investigate this as I 
do and report back.


>I agree I don't know of any device that is just
>8 Bit. SPI is a serial protocol and as such I should
>be able to handle any word-length in a way.

The only micros with HW support that support as low as single bit transfers 
(and I may be misremembering them) are some Motorola (now Freescale) 
devices, the largest I've seen is 32 bits, the Motorola devices I believe 
only went to 8 or 16 depending on the family.  AFAIR even some of them only 
supported (multiples of) 8 bit transfers.  A small number of families 
support variable bit length transfers on an SPI like peripheral but all of 
the ones I've worked with only support 8 bits.  This is widespread enough 
that most of the peripherals I know of that require word lengths that are 
not multiples of 8 (I've seen 12 on occasion) are set up so that you send 
the nearest multiple of 8 and the extra bits are ignored.

Robert

" 'Freedom' has no meaning of itself.  There are always restrictions,
be they legal, genetic, or physical.  If you don't believe me, try to
chew a radio signal. "

                         Kelvin Throop, III

At 12:03 AM 1/17/05 +0000, you wrote:
> > So do most SPI peripherals.
> > Surely ... you just read and write multiples of 8 bits.
>Nope.  Just try it.  May work for some ADCs/DACs but certainly will
>not work for all of them.  Multiple Writes may work, but I could
>never get multiple Reads to work.  The interlocking nature of the
>status flag logic seems to get confused.  Appears to be pretty much
>limited to handling only 8 bit contiguous data.

Hmm, I was just through this in detail this morning, I must be missing 
something.  What interlocking status flag logic?  It looked pretty clean 
and straightforward to me.

Robert

" 'Freedom' has no meaning of itself.  There are always restrictions,
be they legal, genetic, or physical.  If you don't believe me, try to
chew a radio signal. "

                         Kelvin Throop, III

On 17 Jan 2005 at 0:03, sig5534 wrote:

> 
> 
> > So do most SPI peripherals.  
> > Surely ... you just read and write multiples of 8 bits.
> 
> Nope.  Just try it.  May work for some ADCs/DACs but certainly will
> not work for all of them.  Multiple Writes may work, but I could never
> get multiple Reads to work.  The interlocking nature of the status
> flag logic seems to get confused.  Appears to be pretty much limited
> to handling only 8 bit contiguous data.
> 
> If they changed this on the other CPU versions to handle 16b words,
> well I guess that tells you right there that this SPI must only do 8b
> data.
> 

Do you keep the Chip Select line active across the multiple 8 bit SPI
transfers ?

Regards
  Anton Erasmus
-- 
A J Erasmus

--- In lpc2000@yahoogroups.com, "Anton Erasmus" <antone@s...> wrote:
> Do you keep the Chip Select line active across the multiple 8 bit 
SPI
> transfers ?
> 

Yes.


I would like to know what SPI devices will not work with an 8-bit SPI 
master.

I would like part numbers, not "12-bit devices".

thanks

At 09:18 PM 1/17/05 +0000, you wrote:
>--- In lpc2000@yahoogroups.com, "Anton Erasmus" <antone@s...> wrote:
> > Do you keep the Chip Select line active across the multiple 8 bit
>SPI
> > transfers ?
> >
>
>Yes.
>
>I would like to know what SPI devices will not work with an 8-bit SPI
>master.
>
>I would like part numbers, not "12-bit devices".


I think the question was directed at the original poster who claims that 
the 8 bit SPI peripheral does not work with a 24 bit ADC.  Actually come to 
think of it I wouldn't mind knowing what ADC was giving the problem either.

Robert


" 'Freedom' has no meaning of itself.  There are always restrictions,
be they legal, genetic, or physical.  If you don't believe me, try to
chew a radio signal. "

                         Kelvin Throop, III