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Disabling interrupts from Thumb mode

Disabling interrupts from Thumb mode

2005-02-08 by Richard

Keil does seem to support ARM/thumb interworking.  I have added a
source file which produces ARM code to the project, the rest of which
is in thumb mode.  I have added the following assembly in an attempt
to disable interrupts before switching back to thumb mode.  The code
appears to compile and debug fine but I am not seeing the I and F bits
in the CPSR being set.  Any ideas would be appreciated.

Richard

void arm_Idisable(void){
__asm { MRS		R1, CPSR          
	ORR		R1,R1,#0XC0         
	MSR		CPSR_C, R1           
      }
  }




void arm_Ienable(void)
	{
__asm {
	MRS		R1, CPSR          
	BIC		R1,R1,#0XC0         
	MSR		CPSR_C, R1
       }   
   }

Re: [lpc2000] Disabling interrupts from Thumb mode

2005-02-08 by Charles Manning

The hassle with this is that Thumb mode does not support the MRS and MSR 
instructions. You need to change mode to ARM mode to get these.

Even if you generate ARM code, you still need to do the interworking for the 
CPU to switch modes.

When you say "Keil does not support...", do you mean thie new compiler? Their 
older offering was gcc-based and does support interworking. Suggestion: pound 
on Kiei tech support. Doing things like mixing asm in C can be very compiler 
dependent and will need a Kiel specific solution.


There are basically two ways to switch modes:
1) Interworkling.
2) Exceptions.

To do interworking, in assembler you could do something like this, perhaps:

  .thumb   @ switch to thumb assembly mode

disable_interrupt_thumb:
    mov lr,pc
    bx   disable_interrupt_arm @interworking jump

  .arm  @ switch to ARM assembly mode
disable_interrupt_arm:
   mrs ...
   orr ...
    msr ...
    bx lr   @ interworking return


A way to do this with exceptions is to use a SWI handler with different SWI 
codes for different aactions.
Show quoted textHide quoted text
On Tuesday 08 February 2005 13:56, Richard wrote:
> Keil does seem to support ARM/thumb interworking.  I have added a
> source file which produces ARM code to the project, the rest of which
> is in thumb mode.  I have added the following assembly in an attempt
> to disable interrupts before switching back to thumb mode.  The code
> appears to compile and debug fine but I am not seeing the I and F bits
> in the CPSR being set.  Any ideas would be appreciated.
>
> Richard
>
> void arm_Idisable(void){
> __asm { MRS		R1, CPSR
> 	ORR		R1,R1,#0XC0
> 	MSR		CPSR_C, R1
>       }
>   }
>
>
>
>
> void arm_Ienable(void)
> 	{
> __asm {
> 	MRS		R1, CPSR
> 	BIC		R1,R1,#0XC0
> 	MSR		CPSR_C, R1
>        }
>    }
>
>
>
>
>
>
>
> Yahoo! Groups Links
>
>
>

Re: [lpc2000] Disabling interrupts from Thumb mode

2005-02-08 by 42Bastian Schick

>   .thumb   @ switch to thumb assembly mode
>
> disable_interrupt_thumb:
>     mov lr,pc
>     bx   disable_interrupt_arm @interworking jump
>
>   .arm  @ switch to ARM assembly mode
> disable_interrupt_arm:
>    mrs ...
>    orr ...
>     msr ...
>     bx lr   @ interworking return

This code does not work, you destroy lr !
This works:

@ int di();

	.thumb
di:
	bx	pc
	nop
	.arm
di_arm:
	mrs	r0,cpsr
	orr	r1,r0,#0xc0
	msr	cpsr_c,r1
	bx	lr
	.thumb	

@ void ei(int oldmask);
	.thumb
ei:
	bx	pc
	nop
	.arm
ei_arm:
	and	r0,r0,#0xc0		@ only modify F and I
	mrs	r1,cpsr
	bic	r1,r1,r0
	msr	cpsr_c,r1
	bx	lr

-- 
42Bastian Schick

Re: Disabling interrupts from Thumb mode

2005-02-08 by Richard

Thank you Charles.   My problem was that I was operating in user mode
where one may not modify the control bits in the CPSR.  This was using
the standard issue Keil startup file.  Switching to supervisor mode
solved the problem.  Keil does handle ARM/thumb interworking between
files nicely though I do not know how to handle it within a c file.  

Any reason not to remain in supervisor mode?  Is it more desirable
(appropriate) to operate in system mode?

Richard

--- In lpc2000@yahoogroups.com, Charles Manning <manningc2@a...> wrote:
> 
> 
> The hassle with this is that Thumb mode does not support the MRS and
MSR 
> instructions. You need to change mode to ARM mode to get these.
> 
> Even if you generate ARM code, you still need to do the interworking
for the 
> CPU to switch modes.
> 
> When you say "Keil does not support...", do you mean thie new
compiler? Their 
> older offering was gcc-based and does support interworking.
Suggestion: pound 
> on Kiei tech support. Doing things like mixing asm in C can be very
compiler 
> dependent and will need a Kiel specific solution.
> 
> 
> There are basically two ways to switch modes:
> 1) Interworkling.
> 2) Exceptions.
> 
> To do interworking, in assembler you could do something like this,
perhaps:
> 
>   .thumb   @ switch to thumb assembly mode
> 
> disable_interrupt_thumb:
>     mov lr,pc
>     bx   disable_interrupt_arm @interworking jump
> 
>   .arm  @ switch to ARM assembly mode
> disable_interrupt_arm:
>    mrs ...
>    orr ...
>     msr ...
>     bx lr   @ interworking return
> 
> 
> A way to do this with exceptions is to use a SWI handler with
different SWI 
Show quoted textHide quoted text
> codes for different aactions.
> 
> 
> 
> On Tuesday 08 February 2005 13:56, Richard wrote:
> > Keil does seem to support ARM/thumb interworking.  I have added a
> > source file which produces ARM code to the project, the rest of which
> > is in thumb mode.  I have added the following assembly in an attempt
> > to disable interrupts before switching back to thumb mode.  The code
> > appears to compile and debug fine but I am not seeing the I and F bits
> > in the CPSR being set.  Any ideas would be appreciated.
> >
> > Richard
> >
> > void arm_Idisable(void){
> > __asm { MRS		R1, CPSR
> > 	ORR		R1,R1,#0XC0
> > 	MSR		CPSR_C, R1
> >       }
> >   }
> >
> >
> >
> >
> > void arm_Ienable(void)
> > 	{
> > __asm {
> > 	MRS		R1, CPSR
> > 	BIC		R1,R1,#0XC0
> > 	MSR		CPSR_C, R1
> >        }
> >    }
> >
> >
> >
> >
> >
> >
> >
> > Yahoo! Groups Links
> >
> >
> >

Re: [lpc2000] Re: Disabling interrupts from Thumb mode

2005-02-09 by Charles Manning

On Wednesday 09 February 2005 09:28, Richard wrote:
> Thank you Charles.   My problem was that I was operating in user mode
> where one may not modify the control bits in the CPSR.  This was using
> the standard issue Keil startup file.  Switching to supervisor mode
> solved the problem.  Keil does handle ARM/thumb interworking between
> files nicely though I do not know how to handle it within a c file.
>
> Any reason not to remain in supervisor mode?  Is it more desirable
> (appropriate) to operate in system mode?
>
> Richard

There are 7 different modes, each has different uses:

SVC: Supervisor mode. CPU boots in this mode. Also used for software 
interrupts.
User mode: A "safe" mode. Not generally used in small (LPC21xx-size) embedded 
systems.
System mode: A "protected mode" of user mode
Abort, undefined, interrupt, fast interrupt: Modes for those exceptions.

System and User modes use the same register, all the others have at least 
some private registers.

Now you can, in theory, run the CPU in any mode you choose. However that will 
cause problems if you want to use the different register banks.

For example, you **could** run in interrupt state but then if you tried 
turning on interrupts aand servicing interrupts your main thread would get 
corrupted.  Therefore you'd typically not use interrupt mode.

Similarly, you could use SVC mode. That will be fine unless you use software 
interrupts (SWI) which use SVC mode and would nuke your main thread.

Perhaps the most normal mode to use for general processing in a small 
embedded system (ie. no protected mode OS) would be System mode.

Also, if you're going to use nested interrupts, you'd typically switch to 
system mode while handling the interrupt and then back to IRQ mode before 
returning from the interrupt.

It's a bit of a head-scratcher......, at first anyway

-- CHarles
Show quoted textHide quoted text
>
> --- In lpc2000@yahoogroups.com, Charles Manning <manningc2@a...> wrote:
> > The hassle with this is that Thumb mode does not support the MRS and
>
> MSR
>
> > instructions. You need to change mode to ARM mode to get these.
> >
> > Even if you generate ARM code, you still need to do the interworking
>
> for the
>
> > CPU to switch modes.
> >
> > When you say "Keil does not support...", do you mean thie new
>
> compiler? Their
>
> > older offering was gcc-based and does support interworking.
>
> Suggestion: pound
>
> > on Kiei tech support. Doing things like mixing asm in C can be very
>
> compiler
>
> > dependent and will need a Kiel specific solution.
> >
> >
> > There are basically two ways to switch modes:
> > 1) Interworkling.
> > 2) Exceptions.
> >
> > To do interworking, in assembler you could do something like this,
>
> perhaps:
> >   .thumb   @ switch to thumb assembly mode
> >
> > disable_interrupt_thumb:
> >     mov lr,pc
> >     bx   disable_interrupt_arm @interworking jump
> >
> >   .arm  @ switch to ARM assembly mode
> > disable_interrupt_arm:
> >    mrs ...
> >    orr ...
> >     msr ...
> >     bx lr   @ interworking return
> >
> >
> > A way to do this with exceptions is to use a SWI handler with
>
> different SWI
>
> > codes for different aactions.
> >
> > On Tuesday 08 February 2005 13:56, Richard wrote:
> > > Keil does seem to support ARM/thumb interworking.  I have added a
> > > source file which produces ARM code to the project, the rest of which
> > > is in thumb mode.  I have added the following assembly in an attempt
> > > to disable interrupts before switching back to thumb mode.  The code
> > > appears to compile and debug fine but I am not seeing the I and F bits
> > > in the CPSR being set.  Any ideas would be appreciated.
> > >
> > > Richard
> > >
> > > void arm_Idisable(void){
> > > __asm { MRS		R1, CPSR
> > > 	ORR		R1,R1,#0XC0
> > > 	MSR		CPSR_C, R1
> > >       }
> > >   }
> > >
> > >
> > >
> > >
> > > void arm_Ienable(void)
> > > 	{
> > > __asm {
> > > 	MRS		R1, CPSR
> > > 	BIC		R1,R1,#0XC0
> > > 	MSR		CPSR_C, R1
> > >        }
> > >    }
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > > Yahoo! Groups Links
>
> Yahoo! Groups Links
>
>
>

Re: Disabling interrupts from Thumb mode

2005-02-09 by Richard

Thank you Charles, it is hard to find any "practical" information on
the different modes.  Right now I am running in Supervisor mode but I
think I will switch to system mode to allow the option for SWIs.

Richard


--- In lpc2000@yahoogroups.com, Charles Manning <manningc2@a...> wrote:
> On Wednesday 09 February 2005 09:28, Richard wrote:
> > Thank you Charles.   My problem was that I was operating in user mode
> > where one may not modify the control bits in the CPSR.  This was using
> > the standard issue Keil startup file.  Switching to supervisor mode
> > solved the problem.  Keil does handle ARM/thumb interworking between
> > files nicely though I do not know how to handle it within a c file.
> >
> > Any reason not to remain in supervisor mode?  Is it more desirable
> > (appropriate) to operate in system mode?
> >
> > Richard
> 
> There are 7 different modes, each has different uses:
> 
> SVC: Supervisor mode. CPU boots in this mode. Also used for software 
> interrupts.
> User mode: A "safe" mode. Not generally used in small (LPC21xx-size)
embedded 
> systems.
> System mode: A "protected mode" of user mode
> Abort, undefined, interrupt, fast interrupt: Modes for those exceptions.
> 
> System and User modes use the same register, all the others have at
least 
> some private registers.
> 
> Now you can, in theory, run the CPU in any mode you choose. However
that will 
> cause problems if you want to use the different register banks.
> 
> For example, you **could** run in interrupt state but then if you tried 
> turning on interrupts aand servicing interrupts your main thread
would get 
> corrupted.  Therefore you'd typically not use interrupt mode.
> 
> Similarly, you could use SVC mode. That will be fine unless you use
software 
> interrupts (SWI) which use SVC mode and would nuke your main thread.
> 
> Perhaps the most normal mode to use for general processing in a small 
> embedded system (ie. no protected mode OS) would be System mode.
> 
> Also, if you're going to use nested interrupts, you'd typically
switch to 
> system mode while handling the interrupt and then back to IRQ mode
before 
> returning from the interrupt.
> 
> It's a bit of a head-scratcher......, at first anyway
> 
> -- CHarles
> 
> 
> 
> 
> >
> > --- In lpc2000@yahoogroups.com, Charles Manning <manningc2@a...>
wrote:
> > > The hassle with this is that Thumb mode does not support the MRS and
> >
> > MSR
> >
> > > instructions. You need to change mode to ARM mode to get these.
> > >
> > > Even if you generate ARM code, you still need to do the interworking
> >
> > for the
> >
> > > CPU to switch modes.
> > >
> > > When you say "Keil does not support...", do you mean thie new
> >
> > compiler? Their
> >
> > > older offering was gcc-based and does support interworking.
> >
> > Suggestion: pound
> >
> > > on Kiei tech support. Doing things like mixing asm in C can be very
> >
> > compiler
> >
> > > dependent and will need a Kiel specific solution.
> > >
> > >
> > > There are basically two ways to switch modes:
> > > 1) Interworkling.
> > > 2) Exceptions.
> > >
> > > To do interworking, in assembler you could do something like this,
> >
> > perhaps:
> > >   .thumb   @ switch to thumb assembly mode
> > >
> > > disable_interrupt_thumb:
> > >     mov lr,pc
> > >     bx   disable_interrupt_arm @interworking jump
> > >
> > >   .arm  @ switch to ARM assembly mode
> > > disable_interrupt_arm:
> > >    mrs ...
> > >    orr ...
> > >     msr ...
> > >     bx lr   @ interworking return
> > >
> > >
> > > A way to do this with exceptions is to use a SWI handler with
> >
> > different SWI
> >
> > > codes for different aactions.
> > >
> > > On Tuesday 08 February 2005 13:56, Richard wrote:
> > > > Keil does seem to support ARM/thumb interworking.  I have added a
> > > > source file which produces ARM code to the project, the rest
of which
> > > > is in thumb mode.  I have added the following assembly in an
attempt
> > > > to disable interrupts before switching back to thumb mode. 
The code
> > > > appears to compile and debug fine but I am not seeing the I
and F bits
Show quoted textHide quoted text
> > > > in the CPSR being set.  Any ideas would be appreciated.
> > > >
> > > > Richard
> > > >
> > > > void arm_Idisable(void){
> > > > __asm { MRS		R1, CPSR
> > > > 	ORR		R1,R1,#0XC0
> > > > 	MSR		CPSR_C, R1
> > > >       }
> > > >   }
> > > >
> > > >
> > > >
> > > >
> > > > void arm_Ienable(void)
> > > > 	{
> > > > __asm {
> > > > 	MRS		R1, CPSR
> > > > 	BIC		R1,R1,#0XC0
> > > > 	MSR		CPSR_C, R1
> > > >        }
> > > >    }
> > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > > > Yahoo! Groups Links
> >
> > Yahoo! Groups Links
> >
> >
> >

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