LPC2106 fails to start with fast power slew rate???
2005-02-17 by dharmaBum
I'm working on a design that uses a LPC2106, but the design will be migrating to the LPC2138 on the next revision of the PCB. The LPC2106 seems to have difficulty starting (code does not seem to be executed) when the power supply slew rate exceeds a certain rate. I don't yet have detailed measurements as I just stumbled across this in the lab. I will post the numbers after I do some careful measurements of the 3.3 and 1.8 volt slew rates. If I can determine what the CPU is doing via the JTAG interface, I will share that too. Certain FPGAs are notorious for sensitivity to power supply slew rates. Power slew rates can be too fast as well as too slow. A precedent for this weird behavior does exist. Hopefully, I'm being mislead by something else or have just lost my mind entirely. RESET is asserted for 200 ms after the power supply voltages are stable, then released. The PCB is 12 layer, controlled impedance design with a great deal of bypassing and filtering. Has anybody else observed this kind of LPC2106 behavior? Thanks, Wayne