Lpc2000

Hello,
I need to disable the interrupt completely for a short while. I have 
found that the ARM7 can disable interrupts with the DI and EI asm. 
Theese does only work for me in the startup.s file (I made a test) and 
not as inline asm where I really need them.

I have found some code that may work inline, but can someone tell me 
about their experiences, if any?

Inline asm, that I have found and plan to use:

#define IENABLE                       \
  __asm { MSR     CPSR_c, #0x1F }    /* Enable IRQ (Sys Mode)   */   \

#define IDISABLE                      \
  __asm { MSR     CPSR_c, #0x92 }     /* Disable IRQ (IRQ Mode)  */   \

Will this work or does anybody have a better sollution?

Thanks,
Regards Kasper

Kasper,

> Inline asm, that I have found and plan to use:
>
> #define IENABLE                       \
>   __asm { MSR     CPSR_c, #0x1F }    /* Enable IRQ (Sys Mode)   */   \
>
> #define IDISABLE                      \
>   __asm { MSR     CPSR_c, #0x92 }     /* Disable IRQ (IRQ Mode)  */   \


a) You must be sure you are in ARM mode.
b) You must be at least in SYS mode.
c) You should not switch CPU state unless you are sure you know what you 
are
doing :-)

I always suggest a small assmembly routine.

	.macro SC_TFUNC name
	.text
	.code 16
	.thumb_func
	.globl name
name:
	.endm


/*
****************************************
** disable interrupts and return old mask
****************************************
*/
	SC_TFUNC sc_sysLock
	bx	pc
	nop
	.code 32
	.globl	sc_sysLock_a
sc_sysLock_a:
	mrs	r0,cpsr
	orr	r1,r0,#PSR_I_BIT
	msr	cpsr_c,r1
	bx	lr

/*
****************************************
** restore interrupt mask
****************************************
*/
	SC_TFUNC sc_sysUnlock
	bx	pc
	nop
	.code 32
	.globl	sc_sysUnlock_a
sc_sysUnlock_a:
	and	r0,r0,#PSR_I_BIT
	mrs	r1,cpsr
	bic	r1,r1,#PSR_I_BIT
	orr	r1,r1,r0
	msr	cpsr_c,r1
	bx	lr



-- 
42Bastian Schick

--- In lpc2000@yahoogroups.com, 42Bastian Schick <bastian42@m...> 
wrote:
> Kasper,
> 
> > Inline asm, that I have found and plan to use:
> >
> > #define IENABLE                       \
> >   __asm { MSR     CPSR_c, #0x1F }    /* Enable IRQ (Sys Mode)   
*/   \
> >
> > #define IDISABLE                      \
> >   __asm { MSR     CPSR_c, #0x92 }     /* Disable IRQ (IRQ Mode)  
*/   \
> 
> 
> a) You must be sure you are in ARM mode.
> b) You must be at least in SYS mode.
> c) You should not switch CPU state unless you are sure you know 
what you 
> are
> doing :-)
> 
> I always suggest a small assmembly routine.
> 
> 	.macro SC_TFUNC name
> 	.text
> 	.code 16
> 	.thumb_func
> 	.globl name
> name:
> 	.endm
> 
> 
> /*
> ****************************************
> ** disable interrupts and return old mask
> ****************************************
> */
> 	SC_TFUNC sc_sysLock
> 	bx	pc
> 	nop
> 	.code 32
> 	.globl	sc_sysLock_a
> sc_sysLock_a:
> 	mrs	r0,cpsr
> 	orr	r1,r0,#PSR_I_BIT
> 	msr	cpsr_c,r1
> 	bx	lr
> 
> /*
> ****************************************
> ** restore interrupt mask
> ****************************************
> */
> 	SC_TFUNC sc_sysUnlock
> 	bx	pc
> 	nop
> 	.code 32
> 	.globl	sc_sysUnlock_a
> sc_sysUnlock_a:
> 	and	r0,r0,#PSR_I_BIT
> 	mrs	r1,cpsr
> 	bic	r1,r1,#PSR_I_BIT
> 	orr	r1,r1,r0
> 	msr	cpsr_c,r1
> 	bx	lr
> 
> 
> 
> -- 
> 42Bastian Schick
Hello Bastian
Thanks very much for your answer. Sorry but I do not know asm so 
could you please explain what happens in every line and is the above 
ready to insert in my existing C-code?
Regards Kasper

At 10:57 AM 5/12/05 +0200, 42Bastian Schick wrote:
>Kasper,
>
> > Inline asm, that I have found and plan to use:
> >
> > #define IENABLE                       \
> >   __asm { MSR     CPSR_c, #0x1F }    /* Enable IRQ (Sys Mode)   */   \
> >
> > #define IDISABLE                      \
> >   __asm { MSR     CPSR_c, #0x92 }     /* Disable IRQ (IRQ Mode)  */   \
>
>
>a) You must be sure you are in ARM mode.
>b) You must be at least in SYS mode.
>c) You should not switch CPU state unless you are sure you know what you
>are
>doing :-)

to which I would add

d) use a disable/restore pair rather than a disable/enable pair.

>I always suggest a small assmembly routine.

Also a simple commented version available in the newlib-lpc 
support.  Easily separable.  GNU based but short and simple.

Robert

" 'Freedom' has no meaning of itself.  There are always restrictions,   be 
they legal, genetic, or physical.  If you don't believe me, try to chew a 
radio signal. "  -- Kelvin Throop, III
http://www.aeolusdevelopment.com/

Kasper,

I will not comment every line, but a bit

>> 	.macro SC_TFUNC name
>> 	.text
>> 	.code 16
>> 	.thumb_func
>> 	.globl name
>> name:
>> 	.endm

Simply a macro for my lazy fingers ...

BTW: Get hands on ARM ARM and read it carefully. You will meet assembly 
anyway :-)

>> 	SC_TFUNC sc_sysLock
>> 	bx	pc
>> 	nop
>> 	.code 32
>> 	.globl	sc_sysLock_a
>> sc_sysLock_a:
>> 	mrs	r0,cpsr
>> 	orr	r1,r0,#PSR_I_BIT
>> 	msr	cpsr_c,r1
>> 	bx	lr

Disable interrupts and returns the old PSR in R0 in order to restore it 
later.
The bx pc; nop is a veneer to change from Thumb to ARM mode.

>> 	SC_TFUNC sc_sysUnlock
>> 	bx	pc
>> 	nop
>> 	.code 32
>> 	.globl	sc_sysUnlock_a
>> sc_sysUnlock_a:
>> 	and	r0,r0,#PSR_I_BIT
>> 	mrs	r1,cpsr
>> 	bic	r1,r1,#PSR_I_BIT
>> 	orr	r1,r1,r0
>> 	msr	cpsr_c,r1
>> 	bx	lr

This _restores_ the I bit with the value stored in R0.

Restore because , sc_sysLock() might be called with interrupts already 
disabled.

> Thanks very much for your answer. Sorry but I do not know asm so
> could you please explain what happens in every line and is the above
> ready to insert in my existing C-code?

Put it in lock.S (or any other file, but with capital S) and compile it
(with gcc !). Add prototypes to your C code. Use it.
You may inline it, but _I_ use inline only in very rare situations.


-- 
42Bastian Schick