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Thread
2005-10-17 by wiese_matthias
Hi, we are programming a lpc2294 and have problems with the ARM/THUMB mode. We'd like to use the mixed mode (arm & thumb mode) to save time loading the programs from a 16-Bit flash memory. Unfortunately the program get stucked if an interrupts occurs when we are using the mixed mode. With the arm mode everything works fine. Can someone tell us how we can also work in the thumb mode? Thank you! Matthias
2005-10-17 by Tom Walsh
wiese_matthias wrote: >Hi, >we are programming a lpc2294 and have problems with the ARM/THUMB mode. >We'd like to use the mixed mode (arm & thumb mode) to save time >loading the programs from a 16-Bit flash memory. Unfortunately the >program get stucked if an interrupts occurs when we are using the >mixed mode. With the arm mode everything works fine. >Can someone tell us how we can also work in the thumb mode? >Thank you! >Matthias > > > > I was just reading something about that up at arm.com. Something about having interrupt handlers written / compiled in thumb. IIRC, the ARM processors start in ARM mode, then you have to "BX" them into thumb mode. Same thing with the Interrupts, the interrupts entry is in ARM mode of operation, so you have to enter & leave the handlers properly. IIRC, Chapter 7 explains this: SDT2.50 User Guide <http://www.arm.com/pdfs/sdt250usrman.pdf> I looked at thumb, I'm not ready to mess with interworking yet. TomW -- Tom Walsh - WN3L - Embedded Systems Consultant http://openhardware.net, http://cyberiansoftware.com "Windows? No thanks, I have work to do..." ---------------------------------------------------- [Non-text portions of this message have been removed]
2005-10-17 by Sten
Hello,
entry of interrupts must be compiled in ARM mode. If you return from a
function or interrupt by LR (return address in link register) you do not
need to take care about ARM&Thumb. If you want to jump to a Thumb
function from ARM mode you can use a these instructions
bx ip ;Branch (simple jump)
blx label ;Branch with link register (call subfuction)
All addresses have an even value due to its 32bit (ARM) or 16bit (Thumb)
instruction length. But if you branch to an odd address
(destination_addr + 1) the ARM core will enter Thumb state. If the
address is even it will assume that the code is in ARM mode
/* ARM mode */
1000: ...
1004: blx 2001 ;Call sub-function "subfunc" @0x2000
1008: ...
/* Thumb mode */
subfunc:
2000: push {r4, lr} ;LR = 0x1008 (even: this was ARM mode)
...
2010: pop {r4}
2012: pop {r0} ;R0 = LR
2014: bx r0 ;return (and enter ARM mode again)
-------------------------------------------------------------
/* Thumb mode */
1000: ...
1002: blx 2001 ;Call sub-function "subfunc" @0x2000
1004: ...
/* Thumb mode */
subfunc:
2000: push {r4, lr} ;LR = 0x1005 (odd: this was Thumb mode)
...
2010: pop {r4}
2012: pop {r0} ;R0 = LR
2014: bx r0 ;return (and stay in Thumb mode again)
See the ARM7TDMI technical reference manual for details.
When using GNU gcc don't forget to compile your gcc with the feature
'thumb-interworking' and all objects of your project with the command
line option '--mthumb-interwork'.
Sten
Tom Walsh wrote:
> wiese_matthias wrote:
>
>
>>Hi,
>>we are programming a lpc2294 and have problems with the ARM/THUMB mode.
>>We'd like to use the mixed mode (arm & thumb mode) to save time
>>loading the programs from a 16-Bit flash memory. Unfortunately the
>>program get stucked if an interrupts occurs when we are using the
>>mixed mode. With the arm mode everything works fine.
>>Can someone tell us how we can also work in the thumb mode?
>>Thank you!
>>Matthias
>>
>>
>>
>>
>
> I was just reading something about that up at arm.com. Something about
> having interrupt handlers written / compiled in thumb. IIRC, the ARM
> processors start in ARM mode, then you have to "BX" them into thumb
> mode. Same thing with the Interrupts, the interrupts entry is in ARM
> mode of operation, so you have to enter & leave the handlers properly.
>
> IIRC, Chapter 7 explains this: SDT2.50 User Guide
> <http://www.arm.com/pdfs/sdt250usrman.pdf>
>
> I looked at thumb, I'm not ready to mess with interworking yet.
>
> TomW
>
--
/************************************************
Do you need a tiny and efficient real time
operating system (RTOS) with a preemtive
multitasking for LPC2000 or AT91SAM7?
http://nanortos.net-attack.de/
Or some open-source tools and code for LPC2000?
http://www.net-attack.de/
************************************************/2005-10-17 by Yannick Hildenbrand
Hello,
I just would like to add a small remark to this excellent analysis
The BLX instruction is available on architectures V5 and above (see the
Addison-Wesley ARM Architecture Reference Manual). The LPC 2000 family uses
the V4T architecture, and this means that BLX cannot be used. Be careful
when specifying the core variant in the assembler argument list. If the
right architecture is not correctly specified (or the default is e.g. V5 or
above), the assembler may accept BLX but the code may have strange behavior
on a LPC2000. Double checking this may avoid long hours of debugging.
Cheers.
Duke
De : lpc2000@yahoogroups.com [mailto:lpc2000@yahoogroups.com] De la part de
Sten
Envoyé : lundi 17 octobre 2005 20:28
À : lpc2000@yahoogroups.com
Objet : Re: [lpc2000] ARM mode
Hello,
entry of interrupts must be compiled in ARM mode. If you return from a
function or interrupt by LR (return address in link register) you do not
need to take care about ARM&Thumb. If you want to jump to a Thumb
function from ARM mode you can use a these instructions
bx ip ;Branch (simple jump)
blx label ;Branch with link register (call subfuction)
All addresses have an even value due to its 32bit (ARM) or 16bit (Thumb)
instruction length. But if you branch to an odd address
(destination_addr + 1) the ARM core will enter Thumb state. If the
address is even it will assume that the code is in ARM mode
/* ARM mode */
1000: ...
1004: blx 2001 ;Call sub-function "subfunc" @0x2000
1008: ...
/* Thumb mode */
subfunc:
2000: push {r4, lr} ;LR = 0x1008 (even: this was ARM mode)
...
2010: pop {r4}
2012: pop {r0} ;R0 = LR
2014: bx r0 ;return (and enter ARM mode again)
-------------------------------------------------------------
/* Thumb mode */
1000: ...
1002: blx 2001 ;Call sub-function "subfunc" @0x2000
1004: ...
/* Thumb mode */
subfunc:
2000: push {r4, lr} ;LR = 0x1005 (odd: this was Thumb mode)
...
2010: pop {r4}
2012: pop {r0} ;R0 = LR
2014: bx r0 ;return (and stay in Thumb mode again)
See the ARM7TDMI technical reference manual for details.
When using GNU gcc don't forget to compile your gcc with the feature
'thumb-interworking' and all objects of your project with the command
line option '--mthumb-interwork'.
Sten
Tom Walsh wrote:
> wiese_matthias wrote:
>
>
>>Hi,
>>we are programming a lpc2294 and have problems with the ARM/THUMB mode.
>>We'd like to use the mixed mode (arm & thumb mode) to save time
>>loading the programs from a 16-Bit flash memory. Unfortunately the
>>program get stucked if an interrupts occurs when we are using the
>>mixed mode. With the arm mode everything works fine.
>>Can someone tell us how we can also work in the thumb mode?
>>Thank you!
>>Matthias
>>
>>
>>
>>
>
> I was just reading something about that up at arm.com. Something about
> having interrupt handlers written / compiled in thumb. IIRC, the ARM
> processors start in ARM mode, then you have to "BX" them into thumb
> mode. Same thing with the Interrupts, the interrupts entry is in ARM
> mode of operation, so you have to enter & leave the handlers properly.
>
> IIRC, Chapter 7 explains this: SDT2.50 User Guide
> <http://www.arm.com/pdfs/sdt250usrman.pdf>
>
> I looked at thumb, I'm not ready to mess with interworking yet.
>
> TomW
>
--
/************************************************
Do you need a tiny and efficient real time
operating system (RTOS) with a preemtive
multitasking for LPC2000 or AT91SAM7?
http://nanortos.net-attack.de/
Or some open-source tools and code for LPC2000?
http://www.net-attack.de/
************************************************/
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[Non-text portions of this message have been removed]2005-10-17 by Tom Walsh
Yannick Hildenbrand wrote: >Hello, > > > >I just would like to add a small remark to this excellent analysis > > > >The BLX instruction is available on architectures V5 and above (see the >Addison-Wesley ARM Architecture Reference Manual). The LPC 2000 family uses >the V4T architecture, and this means that BLX cannot be used. Be careful >when specifying the core variant in the assembler argument list. If the >right architecture is not correctly specified (or the default is e.g. V5 or >above), the assembler may accept BLX but the code may have strange behavior >on a LPC2000. Double checking this may avoid long hours of debugging. > > > > I had been wondering which arch type was for the LPC2xxx family, thank you. So, I would imagine that even if I built an arm9tdmi (armv5t) GCC compiler that I could restrict the code generation with "-mcpu=arm7tdmi -march=armv4t" then? I'm asking as I also have an ARM920T system that I also build code for. I'm still pretty new to the details of the ARM variants (seems to be a lot of them ;-). TomW -- Tom Walsh - WN3L - Embedded Systems Consultant http://openhardware.net, http://cyberiansoftware.com "Windows? No thanks, I have work to do..." ----------------------------------------------------
2005-10-18 by Charles Manning
On Tuesday 18 October 2005 12:17, Tom Walsh wrote:
> Yannick Hildenbrand wrote:
> >Hello,
> >
> >
> >
> >I just would like to add a small remark to this excellent analysis
> >
> >
> >
> >The BLX instruction is available on architectures V5 and above (see the
> >Addison-Wesley ARM Architecture Reference Manual). The LPC 2000 family
> > uses the V4T architecture, and this means that BLX cannot be used. Be
> > careful when specifying the core variant in the assembler argument list.
> > If the right architecture is not correctly specified (or the default is
> > e.g. V5 or above), the assembler may accept BLX but the code may have
> > strange behavior on a LPC2000. Double checking this may avoid long hours
> > of debugging.
Instead of doing a blx, the following will work pretty well:
ldr r0,=func_addr (assumes func_addr has 1 set for Thumb funcs)
mov lr,pc
bx r0
>
> I had been wondering which arch type was for the LPC2xxx family, thank
> you. So, I would imagine that even if I built an arm9tdmi (armv5t) GCC
> compiler that I could restrict the code generation with "-mcpu=arm7tdmi
> -march=armv4t" then?
That is correct.
>
> I'm asking as I also have an ARM920T system that I also build code for.
> I'm still pretty new to the details of the ARM variants (seems to be a
> lot of them ;-).
There are quite a few, and some of the versioning is pretty confusing too (eg.
ARM7dtmi uses V4T instruction sets). > > > TomW
2005-10-18 by Sten
Oooops! Sorry, your are right!
Sten
Yannick Hildenbrand wrote:
> Hello,
>
>
>
> I just would like to add a small remark to this excellent analysis
>
>
>
> The BLX instruction is available on architectures V5 and above (see the
> Addison-Wesley ARM Architecture Reference Manual). The LPC 2000 family uses
> the V4T architecture, and this means that BLX cannot be used. Be careful
> when specifying the core variant in the assembler argument list. If the
> right architecture is not correctly specified (or the default is e.g. V5 or
> above), the assembler may accept BLX but the code may have strange behavior
> on a LPC2000. Double checking this may avoid long hours of debugging.
>
>
>
> Cheers.
>
>
>
> Duke
>
>
>
>
> De : lpc2000@yahoogroups.com [mailto:lpc2000@yahoogroups.com] De la part de
> Sten
> Envoy\ufffd : lundi 17 octobre 2005 20:28
> \ufffd : lpc2000@yahoogroups.com
> Objet : Re: [lpc2000] ARM mode
>
>
>
> Hello,
>
> entry of interrupts must be compiled in ARM mode. If you return from a
> function or interrupt by LR (return address in link register) you do not
> need to take care about ARM&Thumb. If you want to jump to a Thumb
> function from ARM mode you can use a these instructions
>
> bx ip ;Branch (simple jump)
> blx label ;Branch with link register (call subfuction)
>
> All addresses have an even value due to its 32bit (ARM) or 16bit (Thumb)
> instruction length. But if you branch to an odd address
> (destination_addr + 1) the ARM core will enter Thumb state. If the
> address is even it will assume that the code is in ARM mode
>
> /* ARM mode */
> 1000: ...
> 1004: blx 2001 ;Call sub-function "subfunc" @0x2000
> 1008: ...
>
> /* Thumb mode */
> subfunc:
> 2000: push {r4, lr} ;LR = 0x1008 (even: this was ARM mode)
> ...
> 2010: pop {r4}
> 2012: pop {r0} ;R0 = LR
> 2014: bx r0 ;return (and enter ARM mode again)
>
> -------------------------------------------------------------
> /* Thumb mode */
> 1000: ...
> 1002: blx 2001 ;Call sub-function "subfunc" @0x2000
> 1004: ...
>
> /* Thumb mode */
> subfunc:
> 2000: push {r4, lr} ;LR = 0x1005 (odd: this was Thumb mode)
> ...
> 2010: pop {r4}
> 2012: pop {r0} ;R0 = LR
> 2014: bx r0 ;return (and stay in Thumb mode again)
>
> See the ARM7TDMI technical reference manual for details.
>
> When using GNU gcc don't forget to compile your gcc with the feature
> 'thumb-interworking' and all objects of your project with the command
> line option '--mthumb-interwork'.
>
> Sten
>
> Tom Walsh wrote:
>
>>wiese_matthias wrote:
>>
>>
>>
>>>Hi,
>>>we are programming a lpc2294 and have problems with the ARM/THUMB mode.
>>>We'd like to use the mixed mode (arm & thumb mode) to save time
>>>loading the programs from a 16-Bit flash memory. Unfortunately the
>>>program get stucked if an interrupts occurs when we are using the
>>>mixed mode. With the arm mode everything works fine.
>>>Can someone tell us how we can also work in the thumb mode?
>>>Thank you!
>>>Matthias
>>>
>>>
>>>
>>>
>>
>>I was just reading something about that up at arm.com. Something about
>>having interrupt handlers written / compiled in thumb. IIRC, the ARM
>>processors start in ARM mode, then you have to "BX" them into thumb
>>mode. Same thing with the Interrupts, the interrupts entry is in ARM
>>mode of operation, so you have to enter & leave the handlers properly.
>>
>>IIRC, Chapter 7 explains this: SDT2.50 User Guide
>><http://www.arm.com/pdfs/sdt250usrman.pdf>
>>
>>I looked at thumb, I'm not ready to mess with interworking yet.
>>
>>TomW
>>
>
>
>
--
/************************************************
Do you need a tiny and efficient real time
operating system (RTOS) with a preemtive
multitasking for LPC2000 or AT91SAM7?
http://nanortos.net-attack.de/
Or some open-source tools and code for LPC2000?
http://www.net-attack.de/
************************************************/