I am porting some CPU16 code in which the addressing was performed using ZK:ZX = 0 and the SCIM control registers were accessed at negative 16-bit displacements from the index register. I like this addressing mode, which would be (d16,An) in CPU32. I am trying to determine if address calculations are full 32 bit in the 683xx or if they are still 24 bit addresses with roll-over. IE, if the scim registers are at $FFF800-$FFFFFF, are they only at $00FFF800 or at $xxFFF800? I was off doing microwaves and RF the entire period of time between learning 6800 assembly in 1983 and self-teaching the extension to CPU16 a couple years ago. I missed the entire 68000 family until a month or so ago and I am slowly learning it... I have P&E Micro assembler, so using C and letting the compiler deal with it isn't an option... Does the scim map to $FFFF F800? Is (d16,An) really going to save as many clock cycles and bytes over direct 32 bit addressing as it appears?
Message
683xx address space and modes...
2002-09-20 by Jeff Andle
Attachments
- No local attachments were found for this message.