68300

Jeff,

The (d16, An) addressing mode is very efficient.  However, "Absolute Short"
[ (xxx).W ] is just as efficient on the CPU32.  The instruction size is the
same, and the execution time is the same.  As long as you define your SIM
addresses starting at $FFFFF800 (*not* $xxFFF800 and *not* $FFF800), the
assembler will see that the target address fits the absolute-short
requirement, which is that the address (viewed as a signed 32-bit value)
must fit into a 16-bit signed number.  Another way of saying it is that if
you sign-extend the 16-bit value, you get the correct 32-bit value.  This
is true of all SIM addresses if you start them with $FF, as in $FFFFF800.

By the way, the addresses are all calculated and stored using full 32-bit
arithmetic.  However, before being used externally *or* internally as an
address to read to or write from, the address is chopped to 24 bits.
Therefore, the SIM registers are available at $xxFFF800 - $xxFFFFFF

By the way #2, "Absolute Long" [ (xxx).L ] is slower than (d16, An) and
absolute short.

Good luck,

Jeff





"Jeff Andle" <andle@...> on 09/20/2002 08:11:49 AM

Please respond to 68300@yahoogroups.com

To:    <68300@yahoogroups.com>
cc:
Subject:    [68300] 683xx address space and modes...


I am porting some CPU16 code in which the addressing was performed using
ZK:ZX = 0 and the SCIM control registers were accessed at negative 16-bit
displacements from the index register.

I like this addressing mode, which would be (d16,An) in CPU32.  I am trying
to determine if address calculations are full 32 bit in the 683xx or if
they
are still 24 bit addresses with roll-over.

IE, if the scim registers are at $FFF800-$FFFFFF, are they only at
$00FFF800
or at $xxFFF800?

I was off doing microwaves and RF the entire period of time between
learning
6800 assembly in 1983 and self-teaching the extension to CPU16 a couple
years ago.  I missed the entire 68000 family until a month or so ago and I
am slowly learning it...  I have P&E Micro assembler, so using C and
letting
the compiler deal with it isn't an option...

Does the scim map to $FFFF F800?
Is (d16,An) really going to save as many clock cycles and bytes over direct
32 bit addressing as it appears?




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