Yahoo Groups archive

68300

Index last updated: 2026-04-29 00:01 UTC

Thread

PLL not locking/ erratic xtal behavior

PLL not locking/ erratic xtal behavior

2003-05-08 by development

Hi All, 
    I am facing a very peculiar problem. I am working on 
68332 with a 32.768 kHz xtal. The design was working fine 
in all the boards previously, but lately the xtal seems to 
going haywire.

    The only difference is that I have now a new set of 
boards, without any change in the crystal circuit. The PLL 
circuit does not lock by itself but if I place my finger 
somewhere near the xtal, it locks. 

 It will run like that for some time but then it starts 
behaving erratically. 

   I am using two 22pF capacitors along with a 330K resitor 
and the feedback resistor value is 10M. On the xtal it is 
written KDS 32.768.

 Any suggestions

Regards,
Prashant Alange
R&D Department,
ID Technologies. (A division of mark elektriks)
============================================================
B1/1, Sai Sahawas Apt., \ufffd|\ufffdPhone: +91-20-4003315, 4007158
Oppo. Corporation Bank, \ufffd|\ufffdTeleFax: +91-20-5410479
Maharshi Karvenagar, \ufffd \ufffd |\ufffdEmail: development@...
Hingne (Bk), \ufffd \ufffd \ufffd \ufffd \ufffd \ufffd | www.markelektriks.com
Pune - 411052. India. \ufffd \ufffd|
============================================================

RE: [68300] PLL not locking/ erratic xtal behavior

2003-05-08 by Melear Charles-rdph40

Prashant,
 
I tried to call you today (8:30 am in Austin, Texas, USA).  I don't think I dialed the number right.  Do I need a country code or is "91" the country code.  You can sure tell I don't dial many international numbers.
 
Any way, I do not believe that your problem is too serious.
 
First of all, I need a little information from you.
 
You stated in your email that everything was working but now, with the new production, things are NOT working.  Now, look at one of the 68332's from the "old" production and one from the "new" production.  I suspect that these parts will be different mask sets.  The newest mask set is J30C. I suspect that these will be the parts that are giving you trouble.  (Earlier mask sets include J66A and F98R)  You can determine the mask number by reading the markings on the package.  The mask set number is right under the Part Number.
 
Anyway, J30C does not have quite as much drive capability as prior mask sets.  This has more to do with the wafer line than the mask set but J30C is only made in one wafer line.  In fact, mask sets are tied to specific wafer lines.
 
So, there are several things to look at.
 
1.  Do you have the "X" bit in the SYNCR register set to a logic 1?  This controls the "divide by 2" circuit on the output of the internal PLL / VCO.  If it is NOT a logic 1, change it to a logic 1 and then adjust the "Y" bits to get the proper frequency.  In other words, if you are operating the 68332 system clock above 8 MHz,  then look at the table in the 68332 manual where it gives divider ratios to obtain various system frequencies based on the X, W and Y bits.  Choose a value from the right hand column.  That is, make sure to use a value with X = 1.
 
2.  Next, it is critical that you use the 3-component (High Stability XFC filter).  If you are not using the High Stability Filter your circuit is going to have clock jitter in the PLL/VCO.  The Normal Stability XFC filter is a singel 0.1 uf capacitor from the XFC pin to Vddsyn.  The 3 component filter is an 18 Kohm resistor in series with a 0.1 uf cap between XFC and Vddsyn.  In parallel with these two components is a 0.01 uf cap.
 
3.  Third, you want to see if your crystal is starting correctly.  The best way to do this is take a scope and monitor CLKOUT.  (DO NOT monitor XTAL or EXTAL  --  the scope will load these pins and give you crazy readings.)
 
Since the J30C mask set does not have quite as much drive capability as prior mask sets, you might have to reduce the value (less ohms) of the series resistor in the external crystal circuit.  Many times, the series resistor is around 330 Kohm.  This may be too big (too many ohms).  There should be about a 200 to 400 millisecond delay between the application of power to the appearance of an 8.3 MHz signal on CLKOUT. If the series resistor is too small (less ohms) the 68332 may be overdriving the crystal and give really strange start up characteristics.  If the series resistor is too big, the crystal will take a very long time to start.
 
Anyway, check these things out and let me know your results.  Be sure to check the mask sets.  J30C is the only mask set in production and it will be the only one in production for a very long time into the future.  So, you need to take into account the requirements of this mask set.  That is, use the 3-component XFC filter, make sure the X bit = 1 and properly size the series resistor in the external crystal circuit.
 
Best regards,
 
 
Charlie
Show quoted textHide quoted text
-----Original Message-----
From: development [mailto:development@...]
Sent: Thursday, May 08, 2003 2:24 AM
To: 68300@yahoogroups.com
Subject: [68300] PLL not locking/ erratic xtal behavior


Hi All, 
    I am facing a very peculiar problem. I am working on 
68332 with a 32.768 kHz xtal. The design was working fine 
in all the boards previously, but lately the xtal seems to 
going haywire.

    The only difference is that I have now a new set of 
boards, without any change in the crystal circuit. The PLL 
circuit does not lock by itself but if I place my finger 
somewhere near the xtal, it locks. 

It will run like that for some time but then it starts 
behaving erratically. 

   I am using two 22pF capacitors along with a 330K resitor 
and the feedback resistor value is 10M. On the xtal it is 
written KDS 32.768.

Any suggestions

Regards,
Prashant Alange
R&D Department,
ID Technologies. (A division of mark elektriks)
============================================================
B1/1, Sai Sahawas Apt.,  | Phone: +91-20-4003315, 4007158
Oppo. Corporation Bank,  | TeleFax: +91-20-5410479
Maharshi Karvenagar,     | Email: development@...
Hingne (Bk),             | www.markelektriks.com
Pune - 411052. India.    |
============================================================




Yahoo! Groups Sponsor	
 <http://rd.yahoo.com/M=251812.3170658.4537139.1261774/D=egroupweb/S=1706554205:HM/A=1564415/R=0/*http://www.netflix.com/Default?mqso=60164784&partid=3170658> 	
  <http://us.adserver.yahoo.com/l?M=251812.3170658.4537139.1261774/D=egroupmail/S=:HM/A=1564415/rand=176942211> 	

---------------------------------------------------
To unsubscribe from this group, send an email to:
68300-unsubscribe@yahoogroups.com

To learn more about Motorola Microcontrollers, please visit
http://www.motorola.com/mcu <http://www.motorola.com/mcu> 



Your use of Yahoo! Groups is subject to the Yahoo! Terms of Service <http://docs.yahoo.com/info/terms/> . 




[Non-text portions of this message have been removed]

RE: [68300] PLL not locking/ erratic xtal behavior

2003-05-21 by development

Hi Charles,
        Thanks a lot for your detailed reply. I am 
extremely sorry for taking time to reply back. The country 
code is 91 and probably you have to dial 0 as I have to 
dial a 0 when I call up US. 

     Anyway the problem has been solved and it was due to 
the type of flux used by the board assembler. The flux was 
used for the microcontroller and since the XTAL was in the 
vicinity, it was being affected. The flux is not very 
easily detectable by the naked eye and that was the reason 
that we failed to notice it prima facie. 

    The solution was the simplest as I just soaked the 
boards in gasoline and gave them all a good sunbath. The 
boards having been subject to such pampering are now well 
mannered.

    Anyway thanks a lot for your suggestions which have 
indeed been very helpful, especially the points regarding 
the stability and I will incorporate it in the next version 
of the board. Somehow stability did not affect us till now 
and that is the reason that we overlooked it.


Thanks & Regards,

Philip Jones,
Engineer,
R&D Department,
ID Technologies. (A division of mark elektriks)
============================================================
B1/1, Sai Sahawas Apt., \ufffd|\ufffdPhone: +91-20-4003315, 4007158
Oppo. Corporation Bank, \ufffd|\ufffdTeleFax: +91-20-5410479
Maharshi Karvenagar, \ufffd \ufffd |\ufffdEmail: development@...
Hingne (Bk), \ufffd \ufffd \ufffd \ufffd \ufffd \ufffd | www.markelektriks.com
Pune - 411052. India. \ufffd \ufffd|
============================================================


-----Original Message-----
From: Melear Charles-rdph40 <charles.melear@...>
To: "'68300@yahoogroups.com'" <68300@yahoogroups.com>
Date: Thu, 8 May 2003 06:55:51 -0700
Show quoted textHide quoted text
Subject: RE: [68300] PLL not locking/ erratic xtal behavior

> Prashant,
>  
> I tried to call you today (8:30 am in Austin, Texas,
> USA).  I don't think I dialed the number right.  Do I
> need a country code or is "91" the country code.  You can
> sure tell I don't dial many international numbers.
>  
> Any way, I do not believe that your problem is too
> serious.
>  
> First of all, I need a little information from you.
>  
> You stated in your email that everything was working but
> now, with the new production, things are NOT working. 
> Now, look at one of the 68332's from the "old" production
> and one from the "new" production.  I suspect that these
> parts will be different mask sets.  The newest mask set
> is J30C. I suspect that these will be the parts that are
> giving you trouble.  (Earlier mask sets include J66A and
> F98R)  You can determine the mask number by reading the
> markings on the package.  The mask set number is right
> under the Part Number.
>  
> Anyway, J30C does not have quite as much drive capability
> as prior mask sets.  This has more to do with the wafer
> line than the mask set but J30C is only made in one wafer
> line.  In fact, mask sets are tied to specific wafer
> lines.
>  
> So, there are several things to look at.
>  
> 1.  Do you have the "X" bit in the SYNCR register set to
> a logic 1?  This controls the "divide by 2" circuit on
> the output of the internal PLL / VCO.  If it is NOT a
> logic 1, change it to a logic 1 and then adjust the "Y"
> bits to get the proper frequency.  In other words, if you
> are operating the 68332 system clock above 8 MHz,  then
> look at the table in the 68332 manual where it gives
> divider ratios to obtain various system frequencies based
> on the X, W and Y bits.  Choose a value from the right
> hand column.  That is, make sure to use a value with X =
> 1.
>  
> 2.  Next, it is critical that you use the 3-component
> (High Stability XFC filter).  If you are not using the
> High Stability Filter your circuit is going to have clock
> jitter in the PLL/VCO.  The Normal Stability XFC filter
> is a singel 0.1 uf capacitor from the XFC pin to Vddsyn. 
> The 3 component filter is an 18 Kohm resistor in series
> with a 0.1 uf cap between XFC and Vddsyn.  In parallel
> with these two components is a 0.01 uf cap.
>  
> 3.  Third, you want to see if your crystal is starting
> correctly.  The best way to do this is take a scope and
> monitor CLKOUT.  (DO NOT monitor XTAL or EXTAL  --  the
> scope will load these pins and give you crazy readings.)
>  
> Since the J30C mask set does not have quite as much drive
> capability as prior mask sets, you might have to reduce
> the value (less ohms) of the series resistor in the
> external crystal circuit.  Many times, the series
> resistor is around 330 Kohm.  This may be too big (too
> many ohms).  There should be about a 200 to 400
> millisecond delay between the application of power to the
> appearance of an 8.3 MHz signal on CLKOUT. If the series
> resistor is too small (less ohms) the 68332 may be
> overdriving the crystal and give really strange start up
> characteristics.  If the series resistor is too big, the
> crystal will take a very long time to start.
>  
> Anyway, check these things out and let me know your
> results.  Be sure to check the mask sets.  J30C is the
> only mask set in production and it will be the only one
> in production for a very long time into the future.  So,
> you need to take into account the requirements of this
> mask set.  That is, use the 3-component XFC filter, make
> sure the X bit = 1 and properly size the series resistor
> in the external crystal circuit.
>  
> Best regards,
>  
>  
> Charlie
>  
> 
> -----Original Message-----
> From: development [mailto:development@...]
> Sent: Thursday, May 08, 2003 2:24 AM
> To: 68300@yahoogroups.com
> Subject: [68300] PLL not locking/ erratic xtal behavior
> 
> 
> Hi All, 
>     I am facing a very peculiar problem. I am working on 
> 68332 with a 32.768 kHz xtal. The design was working fine
> in all the boards previously, but lately the xtal seems
> to 
> going haywire.
> 
>     The only difference is that I have now a new set of 
> boards, without any change in the crystal circuit. The
> PLL 
> circuit does not lock by itself but if I place my finger 
> somewhere near the xtal, it locks. 
> 
> It will run like that for some time but then it starts 
> behaving erratically. 
> 
>    I am using two 22pF capacitors along with a 330K
> resitor 
> and the feedback resistor value is 10M. On the xtal it is
> written KDS 32.768.
> 
> Any suggestions
> 
> Regards,
> Prashant Alange
> R&D Department,
> ID Technologies. (A division of mark elektriks)
> =========================================================
> ===
> B1/1, Sai Sahawas Apt.,  | Phone: +91-20-4003315, 4007158
> Oppo. Corporation Bank,  | TeleFax: +91-20-5410479
> Maharshi Karvenagar,     | Email:
> development@...
> Hingne (Bk),             | www.markelektriks.com
> Pune - 411052. India.    |
> =========================================================
> ===
> 
> 
> 
> 
> Yahoo! Groups Sponsor	
>  <http://rd.yahoo.com/M=251812.3170658.4537139.1261774/D=
> egroupweb/S=1706554205:HM/A=1564415/R=0/*http://www.netfl
> ix.com/Default?mqso=60164784&partid=3170658> 	
>  
> <http://us.adserver.yahoo.com/l?M=251812.3170658.4537139.
> 1261774/D=egroupmail/S=:HM/A=1564415/rand=176942211> 	
> 
> ---------------------------------------------------
> To unsubscribe from this group, send an email to:
> 68300-unsubscribe@yahoogroups.com
> 
> To learn more about Motorola Microcontrollers, please
> visit
> http://www.motorola.com/mcu <http://www.motorola.com/mcu>
> 
> 
> 
> Your use of Yahoo! Groups is subject to the Yahoo! Terms
> of Service <http://docs.yahoo.com/info/terms/> . 
> 
> 
> 
> 
> [Non-text portions of this message have been removed]
> 
> 
> ------------------------ Yahoo! Groups Sponsor
> 
> ---------------------------------------------------
> To unsubscribe from this group, send an email to:
> 68300-unsubscribe@yahoogroups.com
> 
> To learn more about Motorola Microcontrollers, please
> visit
> http://www.motorola.com/mcu
> 
>  
> 
> Your use of Yahoo! Groups is subject to
> http://docs.yahoo.com/info/terms/ 
>

RE: [68300] PLL not locking/ erratic xtal behavior

2003-05-21 by Melear Charles-rdph40

Hello everyone,
 
I just want to add a little to this thread.  Apparently the customer's problem was caused by solder flux left on the board.  Flux is somewhat conductive, not very conductive but still, it is a conductor.
 
If flux is left on the board in the vicinity of the crystal oscillator, a very high resistive path can be formed to other conductors.  If one of these conductors happens to be either power or ground, problems can (and will) arise.  In normal circuit design, a 10 - 20 MOhm resistor is installed between the XTAL pin and the EXTAL pin.  The XTAL pin is the output of the internal inverter that forms the oscillator and the EXTAL pin is the input to the inverter.  The 10 MOhm feedback resistor is used to pull the input of the internal inverter toward the output.
 
Now, let's say that you have flux on your board and it forms a resistive path between the EXTAL pin and Vss and that the resistance is 10 MOhm.  Lets also assume that the feedback resistor is 10 MOhm.  When the output of the internal inverter is driving high, the output voltage might be around 4 volts.  (Usually its higher but stick with me on this example.)  Because there is a voltage divider formed by the feedback resistor and the "phantom" resistor formed by the solder flux, the EXTAL pin is going to be sitting around 2 volts.  (  4 volts   ---  10 MOhm  ---  EXTAL  --- 10 MOhm  --- Vss)  The question here is this:  is the logic level on the EXTAL pin a logic 1 or a logic 0?  Recall that a guaranteed logic 1 is 2.4 volts.  Well, you really can't answer the question because 2.0 volts is in the "no man's land" between a logic 0 and a logic 1.  Now, let's say that on a particular part that the true switch point from a logic 0 to a logic 1 is 2.1 volts.  Now, there is a real !
 problem because the part we are using in this example is driving a logic 1 and outputting 4 volts.  However, the input of the internal inverter is interpeting 2.0 volts (the voltage on the input because of the voltage divider effect) as a logic 0, the inverter is stable.  That is, a logic 0 on the input and a logic 1 on the output.  What could be more stable than that?  So, what has been created is an oscillator which won't oscillate because there is a stable condition.
 
So, the moral of this storey is that one must be very careful about cleaning stuff off their PC boards during the manufacturing process.  And, remember, these unexpected resistive paths can be on the inner layers of the PC board.
 
Oh, by the way, the usual symptom of this condition is that the oscillator just won't start but then, if the logic levels are right on the edge, anything can happen.
 
Regards,
 
Charlie
Show quoted textHide quoted text
-----Original Message-----
From: development [mailto:development@...]
Sent: Wednesday, May 21, 2003 8:36 AM
To: 68300@yahoogroups.com
Subject: RE: [68300] PLL not locking/ erratic xtal behavior


Hi Charles,
        Thanks a lot for your detailed reply. I am 
extremely sorry for taking time to reply back. The country 
code is 91 and probably you have to dial 0 as I have to 
dial a 0 when I call up US. 

     Anyway the problem has been solved and it was due to 
the type of flux used by the board assembler. The flux was 
used for the microcontroller and since the XTAL was in the 
vicinity, it was being affected. The flux is not very 
easily detectable by the naked eye and that was the reason 
that we failed to notice it prima facie. 

    The solution was the simplest as I just soaked the 
boards in gasoline and gave them all a good sunbath. The 
boards having been subject to such pampering are now well 
mannered.

    Anyway thanks a lot for your suggestions which have 
indeed been very helpful, especially the points regarding 
the stability and I will incorporate it in the next version 
of the board. Somehow stability did not affect us till now 
and that is the reason that we overlooked it.


Thanks & Regards,

Philip Jones,
Engineer,
R&D Department,
ID Technologies. (A division of mark elektriks)
============================================================
B1/1, Sai Sahawas Apt.,  | Phone: +91-20-4003315, 4007158
Oppo. Corporation Bank,  | TeleFax: +91-20-5410479
Maharshi Karvenagar,     | Email: development@...
Hingne (Bk),             | www.markelektriks.com
Pune - 411052. India.    |
============================================================


-----Original Message-----
From: Melear Charles-rdph40 <charles.melear@...>
To: "'68300@yahoogroups.com'" <68300@yahoogroups.com>
Date: Thu, 8 May 2003 06:55:51 -0700
Subject: RE: [68300] PLL not locking/ erratic xtal behavior

> Prashant,
>  
> I tried to call you today (8:30 am in Austin, Texas,
> USA).  I don't think I dialed the number right.  Do I
> need a country code or is "91" the country code.  You can
> sure tell I don't dial many international numbers.
>  
> Any way, I do not believe that your problem is too
> serious.
>  
> First of all, I need a little information from you.
>  
> You stated in your email that everything was working but
> now, with the new production, things are NOT working. 
> Now, look at one of the 68332's from the "old" production
> and one from the "new" production.  I suspect that these
> parts will be different mask sets.  The newest mask set
> is J30C. I suspect that these will be the parts that are
> giving you trouble.  (Earlier mask sets include J66A and
> F98R)  You can determine the mask number by reading the
> markings on the package.  The mask set number is right
> under the Part Number.
>  
> Anyway, J30C does not have quite as much drive capability
> as prior mask sets.  This has more to do with the wafer
> line than the mask set but J30C is only made in one wafer
> line.  In fact, mask sets are tied to specific wafer
> lines.
>  
> So, there are several things to look at.
>  
> 1.  Do you have the "X" bit in the SYNCR register set to
> a logic 1?  This controls the "divide by 2" circuit on
> the output of the internal PLL / VCO.  If it is NOT a
> logic 1, change it to a logic 1 and then adjust the "Y"
> bits to get the proper frequency.  In other words, if you
> are operating the 68332 system clock above 8 MHz,  then
> look at the table in the 68332 manual where it gives
> divider ratios to obtain various system frequencies based
> on the X, W and Y bits.  Choose a value from the right
> hand column.  That is, make sure to use a value with X =
> 1.
>  
> 2.  Next, it is critical that you use the 3-component
> (High Stability XFC filter).  If you are not using the
> High Stability Filter your circuit is going to have clock
> jitter in the PLL/VCO.  The Normal Stability XFC filter
> is a singel 0.1 uf capacitor from the XFC pin to Vddsyn. 
> The 3 component filter is an 18 Kohm resistor in series
> with a 0.1 uf cap between XFC and Vddsyn.  In parallel
> with these two components is a 0.01 uf cap.
>  
> 3.  Third, you want to see if your crystal is starting
> correctly.  The best way to do this is take a scope and
> monitor CLKOUT.  (DO NOT monitor XTAL or EXTAL  --  the
> scope will load these pins and give you crazy readings.)
>  
> Since the J30C mask set does not have quite as much drive
> capability as prior mask sets, you might have to reduce
> the value (less ohms) of the series resistor in the
> external crystal circuit.  Many times, the series
> resistor is around 330 Kohm.  This may be too big (too
> many ohms).  There should be about a 200 to 400
> millisecond delay between the application of power to the
> appearance of an 8.3 MHz signal on CLKOUT. If the series
> resistor is too small (less ohms) the 68332 may be
> overdriving the crystal and give really strange start up
> characteristics.  If the series resistor is too big, the
> crystal will take a very long time to start.
>  
> Anyway, check these things out and let me know your
> results.  Be sure to check the mask sets.  J30C is the
> only mask set in production and it will be the only one
> in production for a very long time into the future.  So,
> you need to take into account the requirements of this
> mask set.  That is, use the 3-component XFC filter, make
> sure the X bit = 1 and properly size the series resistor
> in the external crystal circuit.
>  
> Best regards,
>  
>  
> Charlie
>  
> 
> -----Original Message-----
> From: development [mailto:development@...]
> Sent: Thursday, May 08, 2003 2:24 AM
> To: 68300@yahoogroups.com
> Subject: [68300] PLL not locking/ erratic xtal behavior
> 
> 
> Hi All, 
>     I am facing a very peculiar problem. I am working on 
> 68332 with a 32.768 kHz xtal. The design was working fine
> in all the boards previously, but lately the xtal seems
> to 
> going haywire.
> 
>     The only difference is that I have now a new set of 
> boards, without any change in the crystal circuit. The
> PLL 
> circuit does not lock by itself but if I place my finger 
> somewhere near the xtal, it locks. 
> 
> It will run like that for some time but then it starts 
> behaving erratically. 
> 
>    I am using two 22pF capacitors along with a 330K
> resitor 
> and the feedback resistor value is 10M. On the xtal it is
> written KDS 32.768.
> 
> Any suggestions
> 
> Regards,
> Prashant Alange
> R&D Department,
> ID Technologies. (A division of mark elektriks)
> =========================================================
> ===
> B1/1, Sai Sahawas Apt.,  | Phone: +91-20-4003315, 4007158
> Oppo. Corporation Bank,  | TeleFax: +91-20-5410479
> Maharshi Karvenagar,     | Email:
> development@...
> Hingne (Bk),             | www.markelektriks.com
> Pune - 411052. India.    |
> =========================================================
> ===
> 
> 
> 
> 
> Yahoo! Groups Sponsor      
>  < http://rd.yahoo.com/M=251812.3170658.4537139.1261774/D= <http://rd.yahoo.com/M=251812.3170658.4537139.1261774/D=> 
> egroupweb/S=1706554205:HM/A=1564415/R=0/* http://www.netfl <http://www.netfl> 
> ix.com/Default?mqso=60164784&partid=3170658>       
>  
> < http://us.adserver.yahoo.com/l?M=251812.3170658.4537139. <http://us.adserver.yahoo.com/l?M=251812.3170658.4537139.> 
> 1261774/D=egroupmail/S=:HM/A=1564415/rand=176942211>       
> 
> ---------------------------------------------------
> To unsubscribe from this group, send an email to:
> 68300-unsubscribe@yahoogroups.com
> 
> To learn more about Motorola Microcontrollers, please
> visit
> http://www.motorola.com/mcu <http://www.motorola.com/mcu>  < http://www.motorola.com/mcu <http://www.motorola.com/mcu> >
> 
> 
> 
> Your use of Yahoo! Groups is subject to the Yahoo! Terms
> of Service < http://docs.yahoo.com/info/terms/ <http://docs.yahoo.com/info/terms/> > . 
> 
> 
> 
> 
> [Non-text portions of this message have been removed]
> 
> 
> ------------------------ Yahoo! Groups Sponsor
> 
> ---------------------------------------------------
> To unsubscribe from this group, send an email to:
> 68300-unsubscribe@yahoogroups.com
> 
> To learn more about Motorola Microcontrollers, please
> visit
> http://www.motorola.com/mcu <http://www.motorola.com/mcu> 
> 
>  
> 
> Your use of Yahoo! Groups is subject to
> http://docs.yahoo.com/info/terms/ <http://docs.yahoo.com/info/terms/>  
> 




Yahoo! Groups Sponsor	

ADVERTISEMENT
 <http://rd.yahoo.com/M=244522.3313099.4604523.1261774/D=egroupweb/S=1706554205:HM/A=1595055/R=0/*http://ashnin.com/clk/muryutaitakenattogyo?YH=3313099&yhad=1595055> Click Here!	
  <http://us.adserver.yahoo.com/l?M=244522.3313099.4604523.1261774/D=egroupmail/S=:HM/A=1595055/rand=296097785> 	

---------------------------------------------------
To unsubscribe from this group, send an email to:
68300-unsubscribe@yahoogroups.com

To learn more about Motorola Microcontrollers, please visit
http://www.motorola.com/mcu <http://www.motorola.com/mcu> 



Your use of Yahoo! Groups is subject to the Yahoo! Terms of Service <http://docs.yahoo.com/info/terms/> . 




[Non-text portions of this message have been removed]

RE: [68300] PLL not locking/ erratic xtal behavior

2003-05-21 by Scott Newell

>I just want to add a little to this thread.  Apparently the customer's
>problem was caused by solder flux left on the board.  Flux is somewhat
>conductive, not very conductive but still, it is a conductor.

I had a very similar problem--one turnkey board assembly house would send
us boards, and we had a heck of a time with oscillator startup.  Probably
10% failure, if not more.  I was pulling my hair out over it (as anyone on
the list back then will remember), and of course, the assembly house would
tell me over and over that the flux (no clean) didn't matter.  They don't
build our boards anymore, we avoid no clean flux, and life is _much_ better.

From now on, I'll probably roll my own 4.something MHz oscillator and
divide down to ~32 kHz (or maybe 38.4 KHz--it works out nicely for a 100 Hz
ticker and common baud rates), rather than deal with the fragile, picky,
slow starting 32 kHz rocks.  It's not like the '332 is micropower to begin
with, so to me the 32kHz rock doesn't make much sense.


newell

RE: [68300] PLL not locking/ erratic xtal behavior

2003-05-21 by Robert Yablonski

I have had a bitch of a problem with the watch crystal.  Besides the dirty 
board problem, the crystal is sensitive to heating and cooling.  It shifts 
frequency much more than a real crystal.  But then there are other problems 
to watch out for.  For example my design has the 68332 driven from the 
watch rock and a deadman timer driven from a 1MHz CTS oscillator.  The 
oscillator sometimes bursts into third overtone and runs at 2.98xx MHz.  So 
sticking in another solution may just be switching dead horses.

R. Yablonski

At 09:19 AM 5/21/03 -0500, you wrote:
Show quoted textHide quoted text
> >I just want to add a little to this thread.  Apparently the customer's
> >problem was caused by solder flux left on the board.  Flux is somewhat
> >conductive, not very conductive but still, it is a conductor.
>
>I had a very similar problem--one turnkey board assembly house would send
>us boards, and we had a heck of a time with oscillator startup.  Probably
>10% failure, if not more.  I was pulling my hair out over it (as anyone on
>the list back then will remember), and of course, the assembly house would
>tell me over and over that the flux (no clean) didn't matter.  They don't
>build our boards anymore, we avoid no clean flux, and life is _much_ better.
>
> >From now on, I'll probably roll my own 4.something MHz oscillator and
>divide down to ~32 kHz (or maybe 38.4 KHz--it works out nicely for a 100 Hz
>ticker and common baud rates), rather than deal with the fragile, picky,
>slow starting 32 kHz rocks.  It's not like the '332 is micropower to begin
>with, so to me the 32kHz rock doesn't make much sense.
>
>
>newell
>
>
>
>---------------------------------------------------
>To unsubscribe from this group, send an email to:
>68300-unsubscribe@yahoogroups.com
>
>To learn more about Motorola Microcontrollers, please visit
>http://www.motorola.com/mcu
>
>
>
>Your use of Yahoo! Groups is subject to http://docs.yahoo.com/info/terms/

Re: [68300] PLL not locking/ erratic xtal behavior

2003-05-21 by Mark Wyman

Same problem on a RTC part a while ago. It seems the "environmentally safe" flux is worse than most in this area, and being biological in nature it attracts moisture. The damper the weather, the more conductive it is. Where our boards tested fine one day, the next they would not work at all. A little heat with a soldering iron would fix for a while and bake out the moisture (and deceive us into thinking it was a bad solder connection), and then later it would stop working again once it re-absorbed moisture. Needless to say it was very frustrating until we found the problem.

I am trying to figure out if the flux will make a good humidity sensor at this point ;-).

-Mark W.
Show quoted textHide quoted text
  ----- Original Message ----- 
  From: Melear Charles-rdph40 
  To: '68300@yahoogroups.com' 
  Sent: Wednesday, May 21, 2003 10:06 AM
  Subject: RE: [68300] PLL not locking/ erratic xtal behavior


  Hello everyone,

  I just want to add a little to this thread.  Apparently the customer's problem was caused by solder flux left on the board.  Flux is somewhat conductive, not very conductive but still, it is a conductor.

  If flux is left on the board in the vicinity of the crystal oscillator, a very high resistive path can be formed to other conductors.  If one of these conductors happens to be either power or ground, problems can (and will) arise.  In normal circuit design, a 10 - 20 MOhm resistor is installed between the XTAL pin and the EXTAL pin.  The XTAL pin is the output of the internal inverter that forms the oscillator and the EXTAL pin is the input to the inverter.  The 10 MOhm feedback resistor is used to pull the input of the internal inverter toward the output.

  Now, let's say that you have flux on your board and it forms a resistive path between the EXTAL pin and Vss and that the resistance is 10 MOhm.  Lets also assume that the feedback resistor is 10 MOhm.  When the output of the internal inverter is driving high, the output voltage might be around 4 volts.  (Usually its higher but stick with me on this example.)  Because there is a voltage divider formed by the feedback resistor and the "phantom" resistor formed by the solder flux, the EXTAL pin is going to be sitting around 2 volts.  (  4 volts   ---  10 MOhm  ---  EXTAL  --- 10 MOhm  --- Vss)  The question here is this:  is the logic level on the EXTAL pin a logic 1 or a logic 0?  Recall that a guaranteed logic 1 is 2.4 volts.  Well, you really can't answer the question because 2.0 volts is in the "no man's land" between a logic 0 and a logic 1.  Now, let's say that on a particular part that the true switch point from a logic 0 to a logic 1 is 2.1 volts.  Now, there is a real !
  problem because the part we are using in this example is driving a logic 1 and outputting 4 volts.  However, the input of the internal inverter is interpeting 2.0 volts (the voltage on the input because of the voltage divider effect) as a logic 0, the inverter is stable.  That is, a logic 0 on the input and a logic 1 on the output.  What could be more stable than that?  So, what has been created is an oscillator which won't oscillate because there is a stable condition.

  So, the moral of this storey is that one must be very careful about cleaning stuff off their PC boards during the manufacturing process.  And, remember, these unexpected resistive paths can be on the inner layers of the PC board.

  Oh, by the way, the usual symptom of this condition is that the oscillator just won't start but then, if the logic levels are right on the edge, anything can happen.

  Regards,

  Charlie

  -----Original Message-----
  From: development [mailto:development@...]
  Sent: Wednesday, May 21, 2003 8:36 AM
  To: 68300@yahoogroups.com
  Subject: RE: [68300] PLL not locking/ erratic xtal behavior


  Hi Charles,
          Thanks a lot for your detailed reply. I am 
  extremely sorry for taking time to reply back. The country 
  code is 91 and probably you have to dial 0 as I have to 
  dial a 0 when I call up US. 

       Anyway the problem has been solved and it was due to 
  the type of flux used by the board assembler. The flux was 
  used for the microcontroller and since the XTAL was in the 
  vicinity, it was being affected. The flux is not very 
  easily detectable by the naked eye and that was the reason 
  that we failed to notice it prima facie. 

      The solution was the simplest as I just soaked the 
  boards in gasoline and gave them all a good sunbath. The 
  boards having been subject to such pampering are now well 
  mannered.

      Anyway thanks a lot for your suggestions which have 
  indeed been very helpful, especially the points regarding 
  the stability and I will incorporate it in the next version 
  of the board. Somehow stability did not affect us till now 
  and that is the reason that we overlooked it.


  Thanks & Regards,

  Philip Jones,
  Engineer,
  R&D Department,
  ID Technologies. (A division of mark elektriks)
  ============================================================
  B1/1, Sai Sahawas Apt.,  | Phone: +91-20-4003315, 4007158
  Oppo. Corporation Bank,  | TeleFax: +91-20-5410479
  Maharshi Karvenagar,     | Email: development@...
  Hingne (Bk),             | www.markelektriks.com
  Pune - 411052. India.    |
  ============================================================


  -----Original Message-----
  From: Melear Charles-rdph40 <charles.melear@...>
  To: "'68300@yahoogroups.com'" <68300@yahoogroups.com>
  Date: Thu, 8 May 2003 06:55:51 -0700
  Subject: RE: [68300] PLL not locking/ erratic xtal behavior

  > Prashant,
  >  
  > I tried to call you today (8:30 am in Austin, Texas,
  > USA).  I don't think I dialed the number right.  Do I
  > need a country code or is "91" the country code.  You can
  > sure tell I don't dial many international numbers.
  >  
  > Any way, I do not believe that your problem is too
  > serious.
  >  
  > First of all, I need a little information from you.
  >  
  > You stated in your email that everything was working but
  > now, with the new production, things are NOT working. 
  > Now, look at one of the 68332's from the "old" production
  > and one from the "new" production.  I suspect that these
  > parts will be different mask sets.  The newest mask set
  > is J30C. I suspect that these will be the parts that are
  > giving you trouble.  (Earlier mask sets include J66A and
  > F98R)  You can determine the mask number by reading the
  > markings on the package.  The mask set number is right
  > under the Part Number.
  >  
  > Anyway, J30C does not have quite as much drive capability
  > as prior mask sets.  This has more to do with the wafer
  > line than the mask set but J30C is only made in one wafer
  > line.  In fact, mask sets are tied to specific wafer
  > lines.
  >  
  > So, there are several things to look at.
  >  
  > 1.  Do you have the "X" bit in the SYNCR register set to
  > a logic 1?  This controls the "divide by 2" circuit on
  > the output of the internal PLL / VCO.  If it is NOT a
  > logic 1, change it to a logic 1 and then adjust the "Y"
  > bits to get the proper frequency.  In other words, if you
  > are operating the 68332 system clock above 8 MHz,  then
  > look at the table in the 68332 manual where it gives
  > divider ratios to obtain various system frequencies based
  > on the X, W and Y bits.  Choose a value from the right
  > hand column.  That is, make sure to use a value with X =
  > 1.
  >  
  > 2.  Next, it is critical that you use the 3-component
  > (High Stability XFC filter).  If you are not using the
  > High Stability Filter your circuit is going to have clock
  > jitter in the PLL/VCO.  The Normal Stability XFC filter
  > is a singel 0.1 uf capacitor from the XFC pin to Vddsyn. 
  > The 3 component filter is an 18 Kohm resistor in series
  > with a 0.1 uf cap between XFC and Vddsyn.  In parallel
  > with these two components is a 0.01 uf cap.
  >  
  > 3.  Third, you want to see if your crystal is starting
  > correctly.  The best way to do this is take a scope and
  > monitor CLKOUT.  (DO NOT monitor XTAL or EXTAL  --  the
  > scope will load these pins and give you crazy readings.)
  >  
  > Since the J30C mask set does not have quite as much drive
  > capability as prior mask sets, you might have to reduce
  > the value (less ohms) of the series resistor in the
  > external crystal circuit.  Many times, the series
  > resistor is around 330 Kohm.  This may be too big (too
  > many ohms).  There should be about a 200 to 400
  > millisecond delay between the application of power to the
  > appearance of an 8.3 MHz signal on CLKOUT. If the series
  > resistor is too small (less ohms) the 68332 may be
  > overdriving the crystal and give really strange start up
  > characteristics.  If the series resistor is too big, the
  > crystal will take a very long time to start.
  >  
  > Anyway, check these things out and let me know your
  > results.  Be sure to check the mask sets.  J30C is the
  > only mask set in production and it will be the only one
  > in production for a very long time into the future.  So,
  > you need to take into account the requirements of this
  > mask set.  That is, use the 3-component XFC filter, make
  > sure the X bit = 1 and properly size the series resistor
  > in the external crystal circuit.
  >  
  > Best regards,
  >  
  >  
  > Charlie
  >  
  > 
  > -----Original Message-----
  > From: development [mailto:development@...]
  > Sent: Thursday, May 08, 2003 2:24 AM
  > To: 68300@yahoogroups.com
  > Subject: [68300] PLL not locking/ erratic xtal behavior
  > 
  > 
  > Hi All, 
  >     I am facing a very peculiar problem. I am working on 
  > 68332 with a 32.768 kHz xtal. The design was working fine
  > in all the boards previously, but lately the xtal seems
  > to 
  > going haywire.
  > 
  >     The only difference is that I have now a new set of 
  > boards, without any change in the crystal circuit. The
  > PLL 
  > circuit does not lock by itself but if I place my finger 
  > somewhere near the xtal, it locks. 
  > 
  > It will run like that for some time but then it starts 
  > behaving erratically. 
  > 
  >    I am using two 22pF capacitors along with a 330K
  > resitor 
  > and the feedback resistor value is 10M. On the xtal it is
  > written KDS 32.768.
  > 
  > Any suggestions
  > 
  > Regards,
  > Prashant Alange
  > R&D Department,
  > ID Technologies. (A division of mark elektriks)
  > =========================================================
  > ===
  > B1/1, Sai Sahawas Apt.,  | Phone: +91-20-4003315, 4007158
  > Oppo. Corporation Bank,  | TeleFax: +91-20-5410479
  > Maharshi Karvenagar,     | Email:
  > development@...
  > Hingne (Bk),             | www.markelektriks.com
  > Pune - 411052. India.    |
  > =========================================================
  > ===
  > 
  > 
  > 
  > 
  > Yahoo! Groups Sponsor      
  >  < http://rd.yahoo.com/M=251812.3170658.4537139.1261774/D= <http://rd.yahoo.com/M=251812.3170658.4537139.1261774/D=> 
  > egroupweb/S=1706554205:HM/A=1564415/R=0/* http://www.netfl <http://www.netfl> 
  > ix.com/Default?mqso=60164784&partid=3170658>       
  >  
  > < http://us.adserver.yahoo.com/l?M=251812.3170658.4537139. <http://us.adserver.yahoo.com/l?M=251812.3170658.4537139.> 
  > 1261774/D=egroupmail/S=:HM/A=1564415/rand=176942211>       
  > 
  > ---------------------------------------------------
  > To unsubscribe from this group, send an email to:
  > 68300-unsubscribe@yahoogroups.com
  > 
  > To learn more about Motorola Microcontrollers, please
  > visit
  > http://www.motorola.com/mcu <http://www.motorola.com/mcu>  < http://www.motorola.com/mcu <http://www.motorola.com/mcu> >
  > 
  > 
  > 
  > Your use of Yahoo! Groups is subject to the Yahoo! Terms
  > of Service < http://docs.yahoo.com/info/terms/ <http://docs.yahoo.com/info/terms/> > . 
  > 
  > 
  > 
  > 
  > [Non-text portions of this message have been removed]
  > 
  > 
  > ------------------------ Yahoo! Groups Sponsor
  > 
  > ---------------------------------------------------
  > To unsubscribe from this group, send an email to:
  > 68300-unsubscribe@yahoogroups.com
  > 
  > To learn more about Motorola Microcontrollers, please
  > visit
  > http://www.motorola.com/mcu <http://www.motorola.com/mcu> 
  > 
  >  
  > 
  > Your use of Yahoo! Groups is subject to
  > http://docs.yahoo.com/info/terms/ <http://docs.yahoo.com/info/terms/>  
  > 




  Yahoo! Groups Sponsor      

  ADVERTISEMENT
  <http://rd.yahoo.com/M=244522.3313099.4604523.1261774/D=egroupweb/S=1706554205:HM/A=1595055/R=0/*http://ashnin.com/clk/muryutaitakenattogyo?YH=3313099&yhad=1595055> Click Here!      
    <http://us.adserver.yahoo.com/l?M=244522.3313099.4604523.1261774/D=egroupmail/S=:HM/A=1595055/rand=296097785>       

  ---------------------------------------------------
  To unsubscribe from this group, send an email to:
  68300-unsubscribe@yahoogroups.com

  To learn more about Motorola Microcontrollers, please visit
  http://www.motorola.com/mcu <http://www.motorola.com/mcu> 



  Your use of Yahoo! Groups is subject to the Yahoo! Terms of Service <http://docs.yahoo.com/info/terms/> . 




  [Non-text portions of this message have been removed]


        Yahoo! Groups Sponsor 
              ADVERTISEMENT
             
       
       

  ---------------------------------------------------
  To unsubscribe from this group, send an email to:
  68300-unsubscribe@yahoogroups.com

  To learn more about Motorola Microcontrollers, please visit
  http://www.motorola.com/mcu



  Your use of Yahoo! Groups is subject to the Yahoo! Terms of Service. 


[Non-text portions of this message have been removed]

RE: [68300] PLL not locking/ erratic xtal behavior

2003-05-21 by Kuo, Chauncey

We have found in one of our applications (avionics), humidity testing
results in water permeating the urethane conformal coating, creating enough
conductivity to cause the PLL not to lock. When we baked the board dry, the
PLL started working again. We had to switch to parylene conformal coating
for that application to pass humidity testing.

I typically avoid using the PLL approach now and just stick an oscillator on
the board and live with a fixed clock frequency.

thx-

Chauncey Kuo
Control Products
Korry Electronics
901 Dexter Ave. NE
Seattle, WA 98109

ckuo@...
206/281-1476
Show quoted textHide quoted text
-----Original Message-----
From: Mark Wyman [mailto:mark@...]
Sent: Wednesday, May 21, 2003 9:35 AM
To: 68300@yahoogroups.com
Subject: Re: [68300] PLL not locking/ erratic xtal behavior


Same problem on a RTC part a while ago. It seems the "environmentally safe"
flux is worse than most in this area, and being biological in nature it
attracts moisture. The damper the weather, the more conductive it is. Where
our boards tested fine one day, the next they would not work at all. A
little heat with a soldering iron would fix for a while and bake out the
moisture (and deceive us into thinking it was a bad solder connection), and
then later it would stop working again once it re-absorbed moisture.
Needless to say it was very frustrating until we found the problem.

I am trying to figure out if the flux will make a good humidity sensor at
this point ;-).

-Mark W.
  ----- Original Message ----- 
  From: Melear Charles-rdph40 
  To: '68300@yahoogroups.com' 
  Sent: Wednesday, May 21, 2003 10:06 AM
  Subject: RE: [68300] PLL not locking/ erratic xtal behavior


  Hello everyone,

  I just want to add a little to this thread.  Apparently the customer's
problem was caused by solder flux left on the board.  Flux is somewhat
conductive, not very conductive but still, it is a conductor.

  If flux is left on the board in the vicinity of the crystal oscillator, a
very high resistive path can be formed to other conductors.  If one of these
conductors happens to be either power or ground, problems can (and will)
arise.  In normal circuit design, a 10 - 20 MOhm resistor is installed
between the XTAL pin and the EXTAL pin.  The XTAL pin is the output of the
internal inverter that forms the oscillator and the EXTAL pin is the input
to the inverter.  The 10 MOhm feedback resistor is used to pull the input of
the internal inverter toward the output.

  Now, let's say that you have flux on your board and it forms a resistive
path between the EXTAL pin and Vss and that the resistance is 10 MOhm.  Lets
also assume that the feedback resistor is 10 MOhm.  When the output of the
internal inverter is driving high, the output voltage might be around 4
volts.  (Usually its higher but stick with me on this example.)  Because
there is a voltage divider formed by the feedback resistor and the "phantom"
resistor formed by the solder flux, the EXTAL pin is going to be sitting
around 2 volts.  (  4 volts   ---  10 MOhm  ---  EXTAL  --- 10 MOhm  ---
Vss)  The question here is this:  is the logic level on the EXTAL pin a
logic 1 or a logic 0?  Recall that a guaranteed logic 1 is 2.4 volts.  Well,
you really can't answer the question because 2.0 volts is in the "no man's
land" between a logic 0 and a logic 1.  Now, let's say that on a particular
part that the true switch point from a logic 0 to a logic 1 is 2.1 volts.
Now, there is a rea!
l !
  problem because the part we are using in this example is driving a logic 1
and outputting 4 volts.  However, the input of the internal inverter is
interpeting 2.0 volts (the voltage on the input because of the voltage
divider effect) as a logic 0, the inverter is stable.  That is, a logic 0 on
the input and a logic 1 on the output.  What could be more stable than that?
So, what has been created is an oscillator which won't oscillate because
there is a stable condition.

  So, the moral of this storey is that one must be very careful about
cleaning stuff off their PC boards during the manufacturing process.  And,
remember, these unexpected resistive paths can be on the inner layers of the
PC board.

  Oh, by the way, the usual symptom of this condition is that the oscillator
just won't start but then, if the logic levels are right on the edge,
anything can happen.

  Regards,

  Charlie

  -----Original Message-----
  From: development [mailto:development@...]
  Sent: Wednesday, May 21, 2003 8:36 AM
  To: 68300@yahoogroups.com
  Subject: RE: [68300] PLL not locking/ erratic xtal behavior


  Hi Charles,
          Thanks a lot for your detailed reply. I am 
  extremely sorry for taking time to reply back. The country 
  code is 91 and probably you have to dial 0 as I have to 
  dial a 0 when I call up US. 

       Anyway the problem has been solved and it was due to 
  the type of flux used by the board assembler. The flux was 
  used for the microcontroller and since the XTAL was in the 
  vicinity, it was being affected. The flux is not very 
  easily detectable by the naked eye and that was the reason 
  that we failed to notice it prima facie. 

      The solution was the simplest as I just soaked the 
  boards in gasoline and gave them all a good sunbath. The 
  boards having been subject to such pampering are now well 
  mannered.

      Anyway thanks a lot for your suggestions which have 
  indeed been very helpful, especially the points regarding 
  the stability and I will incorporate it in the next version 
  of the board. Somehow stability did not affect us till now 
  and that is the reason that we overlooked it.


  Thanks & Regards,

  Philip Jones,
  Engineer,
  R&D Department,
  ID Technologies. (A division of mark elektriks)
  ============================================================
  B1/1, Sai Sahawas Apt.,  | Phone: +91-20-4003315, 4007158
  Oppo. Corporation Bank,  | TeleFax: +91-20-5410479
  Maharshi Karvenagar,     | Email: development@...
  Hingne (Bk),             | www.markelektriks.com
  Pune - 411052. India.    |
  ============================================================


  -----Original Message-----
  From: Melear Charles-rdph40 <charles.melear@...>
  To: "'68300@yahoogroups.com'" <68300@yahoogroups.com>
  Date: Thu, 8 May 2003 06:55:51 -0700
  Subject: RE: [68300] PLL not locking/ erratic xtal behavior

  > Prashant,
  >  
  > I tried to call you today (8:30 am in Austin, Texas,
  > USA).  I don't think I dialed the number right.  Do I
  > need a country code or is "91" the country code.  You can
  > sure tell I don't dial many international numbers.
  >  
  > Any way, I do not believe that your problem is too
  > serious.
  >  
  > First of all, I need a little information from you.
  >  
  > You stated in your email that everything was working but
  > now, with the new production, things are NOT working. 
  > Now, look at one of the 68332's from the "old" production
  > and one from the "new" production.  I suspect that these
  > parts will be different mask sets.  The newest mask set
  > is J30C. I suspect that these will be the parts that are
  > giving you trouble.  (Earlier mask sets include J66A and
  > F98R)  You can determine the mask number by reading the
  > markings on the package.  The mask set number is right
  > under the Part Number.
  >  
  > Anyway, J30C does not have quite as much drive capability
  > as prior mask sets.  This has more to do with the wafer
  > line than the mask set but J30C is only made in one wafer
  > line.  In fact, mask sets are tied to specific wafer
  > lines.
  >  
  > So, there are several things to look at.
  >  
  > 1.  Do you have the "X" bit in the SYNCR register set to
  > a logic 1?  This controls the "divide by 2" circuit on
  > the output of the internal PLL / VCO.  If it is NOT a
  > logic 1, change it to a logic 1 and then adjust the "Y"
  > bits to get the proper frequency.  In other words, if you
  > are operating the 68332 system clock above 8 MHz,  then
  > look at the table in the 68332 manual where it gives
  > divider ratios to obtain various system frequencies based
  > on the X, W and Y bits.  Choose a value from the right
  > hand column.  That is, make sure to use a value with X =
  > 1.
  >  
  > 2.  Next, it is critical that you use the 3-component
  > (High Stability XFC filter).  If you are not using the
  > High Stability Filter your circuit is going to have clock
  > jitter in the PLL/VCO.  The Normal Stability XFC filter
  > is a singel 0.1 uf capacitor from the XFC pin to Vddsyn. 
  > The 3 component filter is an 18 Kohm resistor in series
  > with a 0.1 uf cap between XFC and Vddsyn.  In parallel
  > with these two components is a 0.01 uf cap.
  >  
  > 3.  Third, you want to see if your crystal is starting
  > correctly.  The best way to do this is take a scope and
  > monitor CLKOUT.  (DO NOT monitor XTAL or EXTAL  --  the
  > scope will load these pins and give you crazy readings.)
  >  
  > Since the J30C mask set does not have quite as much drive
  > capability as prior mask sets, you might have to reduce
  > the value (less ohms) of the series resistor in the
  > external crystal circuit.  Many times, the series
  > resistor is around 330 Kohm.  This may be too big (too
  > many ohms).  There should be about a 200 to 400
  > millisecond delay between the application of power to the
  > appearance of an 8.3 MHz signal on CLKOUT. If the series
  > resistor is too small (less ohms) the 68332 may be
  > overdriving the crystal and give really strange start up
  > characteristics.  If the series resistor is too big, the
  > crystal will take a very long time to start.
  >  
  > Anyway, check these things out and let me know your
  > results.  Be sure to check the mask sets.  J30C is the
  > only mask set in production and it will be the only one
  > in production for a very long time into the future.  So,
  > you need to take into account the requirements of this
  > mask set.  That is, use the 3-component XFC filter, make
  > sure the X bit = 1 and properly size the series resistor
  > in the external crystal circuit.
  >  
  > Best regards,
  >  
  >  
  > Charlie
  >  
  > 
  > -----Original Message-----
  > From: development [mailto:development@...]
  > Sent: Thursday, May 08, 2003 2:24 AM
  > To: 68300@yahoogroups.com
  > Subject: [68300] PLL not locking/ erratic xtal behavior
  > 
  > 
  > Hi All, 
  >     I am facing a very peculiar problem. I am working on 
  > 68332 with a 32.768 kHz xtal. The design was working fine
  > in all the boards previously, but lately the xtal seems
  > to 
  > going haywire.
  > 
  >     The only difference is that I have now a new set of 
  > boards, without any change in the crystal circuit. The
  > PLL 
  > circuit does not lock by itself but if I place my finger 
  > somewhere near the xtal, it locks. 
  > 
  > It will run like that for some time but then it starts 
  > behaving erratically. 
  > 
  >    I am using two 22pF capacitors along with a 330K
  > resitor 
  > and the feedback resistor value is 10M. On the xtal it is
  > written KDS 32.768.
  > 
  > Any suggestions
  > 
  > Regards,
  > Prashant Alange
  > R&D Department,
  > ID Technologies. (A division of mark elektriks)
  > =========================================================
  > ===
  > B1/1, Sai Sahawas Apt.,  | Phone: +91-20-4003315, 4007158
  > Oppo. Corporation Bank,  | TeleFax: +91-20-5410479
  > Maharshi Karvenagar,     | Email:
  > development@...
  > Hingne (Bk),             | www.markelektriks.com
  > Pune - 411052. India.    |
  > =========================================================
  > ===
  > 
  > 
  > 
  > 
  > Yahoo! Groups Sponsor      
  >  < http://rd.yahoo.com/M=251812.3170658.4537139.1261774/D=
<http://rd.yahoo.com/M=251812.3170658.4537139.1261774/D=> 
  > egroupweb/S=1706554205:HM/A=1564415/R=0/* http://www.netfl
<http://www.netfl> 
  > ix.com/Default?mqso=60164784&partid=3170658>       
  >  
  > < http://us.adserver.yahoo.com/l?M=251812.3170658.4537139.
<http://us.adserver.yahoo.com/l?M=251812.3170658.4537139.> 
  > 1261774/D=egroupmail/S=:HM/A=1564415/rand=176942211>       
  > 
  > ---------------------------------------------------
  > To unsubscribe from this group, send an email to:
  > 68300-unsubscribe@yahoogroups.com
  > 
  > To learn more about Motorola Microcontrollers, please
  > visit
  > http://www.motorola.com/mcu <http://www.motorola.com/mcu>  <
http://www.motorola.com/mcu <http://www.motorola.com/mcu> >
  > 
  > 
  > 
  > Your use of Yahoo! Groups is subject to the Yahoo! Terms
  > of Service < http://docs.yahoo.com/info/terms/
<http://docs.yahoo.com/info/terms/> > . 
  > 
  > 
  > 
  > 
  > [Non-text portions of this message have been removed]
  > 
  > 
  > ------------------------ Yahoo! Groups Sponsor
  > 
  > ---------------------------------------------------
  > To unsubscribe from this group, send an email to:
  > 68300-unsubscribe@yahoogroups.com
  > 
  > To learn more about Motorola Microcontrollers, please
  > visit
  > http://www.motorola.com/mcu <http://www.motorola.com/mcu> 
  > 
  >  
  > 
  > Your use of Yahoo! Groups is subject to
  > http://docs.yahoo.com/info/terms/ <http://docs.yahoo.com/info/terms/>  
  > 




  Yahoo! Groups Sponsor      

  ADVERTISEMENT
 
<http://rd.yahoo.com/M=244522.3313099.4604523.1261774/D=egroupweb/S=17065542
05:HM/A=1595055/R=0/*http://ashnin.com/clk/muryutaitakenattogyo?YH=3313099&y
had=1595055> Click Here!      
 
<http://us.adserver.yahoo.com/l?M=244522.3313099.4604523.1261774/D=egroupmai
l/S=:HM/A=1595055/rand=296097785>       

  ---------------------------------------------------
  To unsubscribe from this group, send an email to:
  68300-unsubscribe@yahoogroups.com

  To learn more about Motorola Microcontrollers, please visit
  http://www.motorola.com/mcu <http://www.motorola.com/mcu> 



  Your use of Yahoo! Groups is subject to the Yahoo! Terms of Service
<http://docs.yahoo.com/info/terms/> . 




  [Non-text portions of this message have been removed]


        Yahoo! Groups Sponsor 
              ADVERTISEMENT
             
       
       

  ---------------------------------------------------
  To unsubscribe from this group, send an email to:
  68300-unsubscribe@yahoogroups.com

  To learn more about Motorola Microcontrollers, please visit
  http://www.motorola.com/mcu



  Your use of Yahoo! Groups is subject to the Yahoo! Terms of Service. 


[Non-text portions of this message have been removed]



---------------------------------------------------
To unsubscribe from this group, send an email to:
68300-unsubscribe@yahoogroups.com

To learn more about Motorola Microcontrollers, please visit
http://www.motorola.com/mcu

 

Your use of Yahoo! Groups is subject to http://docs.yahoo.com/info/terms/

Move to quarantaine

This moves the raw source file on disk only. The archive index is not changed automatically, so you still need to run a manual refresh afterward.