AVR-Chat

>
>setup
>.....
>        ldi     r16,0b11101110          ;PORTB B0=icp and B4=Miso as inputs
>        out     DDRB,r16                ;all other outputs

Ok, where it matters, we're same.

>;Set up SPI, LSB first, Master, clock idle high, phase=1, clock fck/64
>        ldi     r17,(1<<SPE)|(1<<DORD)|(1<<MSTR)|(1<<CPOL)|(1<<CPHA)|(1<<SPR0)|(1<<SPR1)
>        out     SPCR,r17

Where it matters, we are doing the same thing, SPI enabled, and Master are "1" on mine, the rest zero. 




>        cbi     portb,SS        ;Clear /SS pin

This one, I don't understand. 
It looks like you're setting up as a slave?


>        out     SPDR,spireg
>; Wait for transmission complete
>Wait4spif:
>        sbis    SPSR,SPIF
>        rjmp    Wait4spif
>        sbi     portb,SS        ;Set /SS pin
>        ret     


A very familiar looking piece of code.