AVR-Chat

--- In AVR-Chat@yahoogroups.com, "Roy E. Burrage" <RBurrage@...> wrote:
> Since this comes up from time to time on the list:
> http://focus.ti.com/lit/an/scea040/scea040.pdf

I took a quick look at this, since I have a logic level translation problem in a product under development.  My impression is that some manager at TI has told some poor struggling application engineer that he's behind on his quota of application notes and he'd better get one out this afternoon.  Note, for example, that the circuit for using an open-drain FET as a level translator inverts the signal, which you almost never want.  Roy, is there anything in here that you think is novel?

Graham.

Since this comes up from time to time on the list:

       http://focus.ti.com/lit/an/scea040/scea040.pdf






[Non-text portions of this message have been removed]

--- In AVR-Chat@yahoogroups.com, wagnerj@... wrote:
>
> You can use the output enable pin of a
> [tristate inverter] as a non-inverting
> input if you do the "correct thing"
> with the normal logic input.

Of course, if this has the logic function you require, but this has nothing to do with my post.

Graham.

I'm sure you're correct, Graham.  I didn't look at it thoroughly as it 
just came through this morning on an EDN blast.

Novel?  Probably not, for those of us who have been doing this sort of 
thing for a while.  The intent was to address some of the issues brought 
forward by the occasional digital only folk who subscribe to this list.


REB



Graham Davies wrote:
> --- In AVR-Chat@yahoogroups.com, "Roy E. Burrage" <RBurrage@...> wrote:
>   
>> Since this comes up from time to time on the list:
>> http://focus.ti.com/lit/an/scea040/scea040.pdf
>>     
>
> I took a quick look at this, since I have a logic level translation problem in a product under development.  My impression is that some manager at TI has told some poor struggling application engineer that he's behind on his quota of application notes and he'd better get one out this afternoon.  Note, for example, that the circuit for using an open-drain FET as a level translator inverts the signal, which you almost never want.  Roy, is there anything in here that you think is novel?
>
> Graham.


[Non-text portions of this message have been removed]

--- In AVR-Chat@yahoogroups.com, "Roy E. Burrage" <RBurrage@...> wrote:

> ... The intent was to address some
> of the issues brought forward by the
> occasional digital only folk who
> subscribe to this list.

OK, there are no other hot threads running right now, so let's chat about this.

I think the only logic level translation problem that doesn't have a number of straightforward solutions is the bi-directional, three-state one where there is no signal to explicitly give the direction of logic flow across the translation boundary.  This occurs, for example, if you want to connect two I2C busses running at different logic levels.

The generally proposed solution is a variation of the uni-directional translator using an N-Channel MOSFET in common-gate mode.  This has you connect the input to the MOSFET source, the gate of the MOSFET goes to the input side logic supply and the drain of the MOSFET has a pullup resistor to the output side logic supply and becomes the output.  A low level on the input (source) turns the MOSFET on (assuming you have a device with a sufficiently low threshold), which connects the output to the low input and there you are.  A high on the input puts the source and drain at the same voltage so the MOSFET turns off and the resistor pulls the output high.

In the bi-directional variation, "input" and "output" are replaced with "left" and "right".  The source also has a pullup to the "left" logic supply.  The gate has to be connected to whichever logic supply is lower.  The theory is now that if either side is pulled low, the MOSFET terminal connected to that side will act as the source, the other side will act as the drain and the MOSFET will turn on, connecting the undriven side to the low from the driven side.  If both sides are high, the MOSFET will be off and the pullup resistors will raise both sides to logic one.  So, you have a sort-of wired-AND arrangement, spanning two (or more) different logic levels.

My question for the non-"digital only" folk is this ... will just about any MOSFET (with an appropriate threshold) perform well in this circuit?  I understand that the beginner-level textbook structure of a MOSFET is symmetrical with respect to source and drain, but there must be some difference in practice with devices designed for specific purposes.  How should I choose a MOSFET for this application?  For example, the manufacturer tells me the gate-to-source threshold voltage and (as mentioned above) this is an important parameter here.  I have no idea what the threshold will be when the drain and source terminals are swapped, but this is just as important.

Graham.

I agree with your first post. I didn't find the TI white paper very
useful. The FET switch discussion using the CB3T bus switch lead to a
dead end in terms of useful ICs that could do the job.

> I think the only logic level translation problem that doesn't have a
number of straightforward solutions is the bi-directional, three-state
one where there is no signal to explicitly give the direction of logic
flow across the translation boundary.

Yup and is exactly the problem I am looking at for my current design.

> The generally proposed solution is a variation of the uni-directional
translator using an N-Channel MOSFET in common-gate mode.
> In the bi-directional variation, "input" and "output" are replaced
with "left" and "right".  The source also has a pullup to the "left"
logic supply.
> My question for the non-"digital only" folk is this ... will just
about any MOSFET (with an appropriate threshold) perform well in this
circuit?

I have chosen the BSS138DW (dual MOSFET) which has a gate threshold of
1.2V. Does any see a problem with using this device for 2.7/3.3 to 5V
level translation?

To answer your question I googled the following paper:
http://www.vartists.com/engineering/N-MOSFET_bidirectional_level_shifter\
_analysis.pdf

> --- In AVR-Chat@yahoogroups.com, "Roy E. Burrage" <RBurrage@...> wrote:
>> Since this comes up from time to time on the list:
>> http://focus.ti.com/lit/an/scea040/scea040.pdf
>
> I took a quick look at this, since I have a logic level translation
> problem in a product under development.  My impression is that some
> manager at TI has told some poor struggling application engineer that he's
> behind on his quota of application notes and he'd better get one out this
> afternoon.  Note, for example, that the circuit for using an open-drain
> FET as a level translator inverts the signal, which you almost never want.
>  Roy, is there anything in here that you think is novel?
>
> Graham.
>
>
>

You can use the output enable pin of a 74LCX124 (I think thats the one,
tristate inverter), as a non-inverting input if you do the "correct thing"
with the normal logic input.

Jim

--- In AVR-Chat@yahoogroups.com, "Mike Perks" <mikep@...> wrote:
>
> To answer your question I googled the following paper:
> http://www.vartists.com/engineering/N-MOSFET_bidirectional_level_shifter\
> _analysis.pdf

That's an interesting paper for anyone not familiar with the circuit, but I don't think the analysis is correct.  Maybe Roy will offer an opinion.

In the problematic case where the MOSFET is used "backwards", the author points out that the diode, present in many MOSFETs from drain to source, will turn on and pull down the source when the drain is low.  But, he then argues that lowering the source voltage in this way turns the MOSFET on, connecting source and drain and passing the full low voltage across the device.  I'm uncomfortable with the argument that a MOSFET turns on is this "normal" manner when the drain voltage is below the source voltage.  I think it turns on because of the gate-drain voltage, but we still have the problem that we don't know the threshold voltage in this mode of operation so we can't be sure the circuit will work as we intend.

Someone might argue that the diode itself passes the low from "right" to "left".  This could be true if it is a Schottky diode with very low forward voltage drop.  So, maybe the answer to my question is to use a MOSFET with a built-in Schottky diode from drain to source and don't worry about the gate-to-drain threshold voltage.

Graham.

On Wed, Apr 8, 2009 at 1:22 PM, Graham Davies <Yahoo37849@ecrostech.com>wrote:

>
> My question for the non-"digital only" folk is this ... will just about any
> MOSFET (with an appropriate threshold) perform well in this circuit?  I
> understand that the beginner-level textbook structure of a MOSFET is
> symmetrical with respect to source and drain, but there must be some
> difference in practice with devices designed for specific purposes.  How
> should I choose a MOSFET for this application?  For example, the
> manufacturer tells me the gate-to-source threshold voltage and (as mentioned
> above) this is an important parameter here.  I have no idea what the
> threshold will be when the drain and source terminals are swapped, but this
> is just as important.
>

The threshold voltage for the MOSFET needs to be safely below the lower of
the two supplies.  For the 3V supply shown, the logic level FETs with a
threshold below 2V should work fine.

MOSFETs are typically either built laterally (very common in IC's, not
common in discrete devices), or vertically.  The lateral devices are
symmetric, in that the drain and source can be swapped with no effect in
operation.   Vertical MOS's are not symmetrical.  The trick here is that the
body diode in the vertical MOSFETs used pull down the source voltage to
where the FET channel conducts and pulls it even further down.  In this case
it is still the gate to source voltage that is turning on the MOSFET.  The

One subtle point of the circuit is that the gate needs to be tied to the
lower of the two supply voltages for the circuit to work.



Jon


[Non-text portions of this message have been removed]

I don't like it.

This scheme may work most of the time, but I agree that we can't 
guarantee it will work when the drain is pulled low.  I come from an old 
school that states we should never count on active component 
characteristics that vary widely, that we should use the active 
component as a function block and such things as gain or switching 
thresholds should be determined by external components.  I would also 
advocate a conscious decision be made for transmit and receive 
functions, so I don't see a lot of use for a circuit such as this one.

I got bit once by a circuit in which the original designer counted on 
the base-emitter leakage current of the series pass transistor element 
to start a regulator.  This was back in the days of linear regulators.  
The transistor actually got better as it aged, lower B-E leakage 
current, and the regulator stopped functioning.  That wasn't an easy 
problem to locate.

Fortunately I work in test, instrumentation, and controls where a few 
cents extra for a reliable design is more important than cost saving at 
the expense of reliable performance.  That's how we get trains that 
crash because an oscillator design is marginal or chemical leaks that 
kill hundreds of people.  Designs that work on paper or in theory don't 
always work in the field.


REB



Graham Davies wrote:
> --- In AVR-Chat@yahoogroups.com, "Mike Perks" <mikep@...> wrote:
>   
>> To answer your question I googled the following paper:
>> http://www.vartists.com/engineering/N-MOSFET_bidirectional_level_shifter\
>> _analysis.pdf
>>     
>
> That's an interesting paper for anyone not familiar with the circuit, but I don't think the analysis is correct.  Maybe Roy will offer an opinion.
>
> In the problematic case where the MOSFET is used "backwards", the author points out that the diode, present in many MOSFETs from drain to source, will turn on and pull down the source when the drain is low.  But, he then argues that lowering the source voltage in this way turns the MOSFET on, connecting source and drain and passing the full low voltage across the device.  I'm uncomfortable with the argument that a MOSFET turns on is this "normal" manner when the drain voltage is below the source voltage.  I think it turns on because of the gate-drain voltage, but we still have the problem that we don't know the threshold voltage in this mode of operation so we can't be sure the circuit will work as we intend.
>
> Someone might argue that the diode itself passes the low from "right" to "left".  This could be true if it is a Schottky diode with very low forward voltage drop.  So, maybe the answer to my question is to use a MOSFET with a built-in Schottky diode from drain to source and don't worry about the gate-to-drain threshold voltage.
>
> Graham.
>


[Non-text portions of this message have been removed]

--- In AVR-Chat@yahoogroups.com, Robert Adsett <subscriptions@...> wrote:
> 
> The diode is inevitable in
> the MOSFET structure isn't it?

No, I don't think so.  Diodes between both source and drain and the substrate are usual, but you can get rid of those too if you don't want them (in the extreme case, using silicon-on-insulator technology).

Most of what I know about MOSFETs is from IC design.  The substrate is generally connected to ground.  N-Channel MOSFETs with their source grounded thus have the diode, but N-Channel MOSFETs with their source connected somewhere else, for example in a NAND structure, don't.  Or, rather, they have the diode but it doesn't go to the source.

I've no idea how this works with individual MOSFETs, which tend to have very complicated structure these days.  I would absolutely not make any assumptions that are not backed up by the manufacturer's data sheet.

Graham.

Graham Davies wrote:
 > the diode, present in many MOSFETs from drain to source,

The diode is inevitable in the MOSFET structure isn't it?  It can be 
optimized for a particular application but not eliminated.

In fact I use MOSFET's as diodes in certain applications since they are 
nice inexpensive power diodes.

Robert

-- 
http://www.aeolusdevelopment.com/

  From the Divided by a Common Language File (Edited to protect the guilty)
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On Fri, Apr 10, 2009 at 11:29 AM, Robert Adsett
<subscriptions@aeolusdevelopment.com> wrote:
> Graham Davies wrote:
>  > the diode, present in many MOSFETs from drain to source,
>
> The diode is inevitable in the MOSFET structure isn't it?  It can be
> optimized for a particular application but not eliminated.

There are specialized fets called BatFets that don't have the diode.

> In fact I use MOSFET's as diodes in certain applications since they are
> nice inexpensive power diodes.

I have a fun bridge rectifier circuit using mosfets that's giving me headaches.
It works on the bench, but I can't get it to sim in spice.


-- 
There is no computer problem which cannot be solved by proper
application of a sufficiently large hammer.

David VanHorn wrote:
> On Fri, Apr 10, 2009 at 11:29 AM, Robert Adsett
> <subscriptions@aeolusdevelopment.com> wrote:
>> Graham Davies wrote:
>>  > the diode, present in many MOSFETs from drain to source,
>>
>> The diode is inevitable in the MOSFET structure isn't it?  It can be
>> optimized for a particular application but not eliminated.
> 
> There are specialized fets called BatFets that don't have the diode.

Do you have a reference?  I've not heard of a BATFET and the only 
reference's I was able to find were TI and Linear datasheets where they 
labelled regular mosfets as BAT FET  based on its circuit location I 
believe.

>> In fact I use MOSFET's as diodes in certain applications since they are
>> nice inexpensive power diodes.
> 
> I have a fun bridge rectifier circuit using mosfets that's giving me headaches.
> It works on the bench, but I can't get it to sim in spice.

Maybe you need to simplify the model and get rid of the FET portion.

Robert

-- 
http://www.aeolusdevelopment.com/

  From the Divided by a Common Language File (Edited to protect the guilty)
ME - "I'd like to get Price and delivery for connector Part # XXXXX"
Dist./Rep - "$X.XX Lead time 37 days"
ME - "Anything we can do about lead time?  37 days seems a bit high."
Dist./Rep - "that is the lead time given because our stock is live....
we currently have stock."

Graham Davies wrote:
> --- In AVR-Chat@yahoogroups.com, Robert Adsett <subscriptions@...> wrote:
>> The diode is inevitable in
>> the MOSFET structure isn't it?
> 
> No, I don't think so.  Diodes between both source and drain and the substrate are usual, but you can get rid of those too if you don't want them (in the extreme case, using silicon-on-insulator technology).

Hmm, I hadn't considered SOI.

> I've no idea how this works with individual MOSFETs, which tend to have very complicated structure these days.  I would absolutely not make any assumptions that are not backed up by the manufacturer's data sheet.

I've never seen any without a parasitic diode.  Usually characterised to 
some extent.  Recently all the power MOSFETs I've seen have the 
parasitic diodes rated to the same current and power capabilities as the 
MOSFET proper.

Robert

-- 
http://www.aeolusdevelopment.com/

  From the Divided by a Common Language File (Edited to protect the guilty)
ME - "I'd like to get Price and delivery for connector Part # XXXXX"
Dist./Rep - "$X.XX Lead time 37 days"
ME - "Anything we can do about lead time?  37 days seems a bit high."
Dist./Rep - "that is the lead time given because our stock is live....
we currently have stock."

> Do you have a reference?  I've not heard of a BATFET and the only
> reference's I was able to find were TI and Linear datasheets where they
> labelled regular mosfets as BAT FET  based on its circuit location I
> believe.

Not offhand, I just remember seeing them on a data sheet somewhere.

>>> In fact I use MOSFET's as diodes in certain applications since they are
>>> nice inexpensive power diodes.
>>
>> I have a fun bridge rectifier circuit using mosfets that's giving me headaches.
>> It works on the bench, but I can't get it to sim in spice.
>
> Maybe you need to simplify the model and get rid of the FET portion.

:)



-- 
There is no computer problem which cannot be solved by proper
application of a sufficiently large hammer.

Here are a couple of application notes that show the power MOSFET 
structure, how the diode comes about, and that it's there to stay:

    http://www.vishay.com/docs/70572/70572.pdf
    http://www.vishay.com/docs/71933/71933.pdf
    http://www.irf.com/technical-info/appnotes/an-1084.pdf

These are for currently popular, power MOSFETs which are "enhancement" 
mode devices ... normally off, turned on.

There's also a "depletion" mode device that's normally on, turned off, 
much like a standard JFET device.  These were actually called Insulated 
Gate Field Effect Transistors (IGFET) back in the old days.  I don't 
know that these devices are available except as small signal devices, or 
if they're even available at all any more.  It's been a while since I 
needed to use a depletion type.  There is no Source-Drain body diode in 
this type device and I believe the last time I did, it was because the 
Source-Drain diode was problematic in that application.

Power MOSFETs do make very inexpensive, high current diodes.  Has anyone 
ever experimented with them with respect to current sharing in parallel 
device configurations, as diodes, like we would when using them in 
parallel as MOSFETs?


REB


Graham Davies wrote:
> --- In AVR-Chat@yahoogroups.com, Robert Adsett <subscriptions@...> wrote:
>   
>> The diode is inevitable in
>> the MOSFET structure isn't it?
>>     
>
> No, I don't think so.  Diodes between both source and drain and the substrate are usual, but you can get rid of those too if you don't want them (in the extreme case, using silicon-on-insulator technology).
>
> Most of what I know about MOSFETs is from IC design.  The substrate is generally connected to ground.  N-Channel MOSFETs with their source grounded thus have the diode, but N-Channel MOSFETs with their source connected somewhere else, for example in a NAND structure, don't.  Or, rather, they have the diode but it doesn't go to the source.
>
> I've no idea how this works with individual MOSFETs, which tend to have very complicated structure these days.  I would absolutely not make any assumptions that are not backed up by the manufacturer's data sheet.
>
> Graham.
>
>
>
>
> ------------------------------------
>
> Yahoo! Groups Links
>
>
>
>
>   


[Non-text portions of this message have been removed]

Roy E. Burrage wrote:
> There's also a "depletion" mode device that's normally on, turned off, 
> much like a standard JFET device.  These were actually called Insulated 
> Gate Field Effect Transistors (IGFET) back in the old days.  I don't 
> know that these devices are available except as small signal devices, or 
> if they're even available at all any more.  It's been a while since I 
> needed to use a depletion type.  There is no Source-Drain body diode in 
> this type device and I believe the last time I did, it was because the 
> Source-Drain diode was problematic in that application.

Supertex makes a few.  Mainly, I think,  for use in HV linear supplies.

> Power MOSFETs do make very inexpensive, high current diodes.  Has anyone 
> ever experimented with them with respect to current sharing in parallel 
> device configurations, as diodes, like we would when using them in 
> parallel as MOSFETs?

Yes, and not surprisingly they have the same issues.  The one attempt I 
observed using them purely as diodes in parallel failed for the obvious 
reason.

I have used them successfully in parallel when they were also in 
parallel with an 'on' MOSFET.

Robert
-- 
http://www.aeolusdevelopment.com/

  From the Divided by a Common Language File (Edited to protect the guilty)
ME - "I'd like to get Price and delivery for connector Part # XXXXX"
Dist./Rep - "$X.XX Lead time 37 days"
ME - "Anything we can do about lead time?  37 days seems a bit high."
Dist./Rep - "that is the lead time given because our stock is live....
we currently have stock."

--- In AVR-Chat@yahoogroups.com, "Roy E. Burrage" <RBurrage@...> wrote:
>
> Here are a couple of application notes
> that show the power MOSFET structure ...

Well, we've drifted off to power MOSFETs here, so I've changed the subject line.  Looking at these applications notes and Fairchild's description of the DMOS process, it seems to me that the diode is caused by the source metalization contacting the P-doped body region.  This is not necessary, it would be easy to avoid, so I conclude that it is done by choice in the same way as connecting source and substrate in the planar process.

I remain unconvinced about the original topic.  Jon says that the descriptions of the MOSFET turning on because the source is pulled low by the drain via the diode is correct, but provides no justification.

Graham.