Lpc2000

The ARM core does some rotating or swapping when you use unaligned 
variables. Exactly when this occurs and if the EMC accepts unaligned 
memory accesses I don't know. But you can look it up in the LPC User 
Manual and the ARM Architecture Reference Manual. This is also not very 
portable, because most memory controllers just raise an exception on 
unaligned memory accesses.

Search this list for a link to an online copy of the ARMARM if you don't 
have the book.

Richard.



Micron Engineering wrote:
> Pieter Verstraelen ha scritto:
>
> >Hello group,
> >
> >we will be using the LPC2210 in Big Endian mode to interface to an Epson
> >S1D13A05. 
> >
> Hmmm... ARM7 core is set to little endian by hardware for Philips cores.
> This means that if you have to interface a 16 bit wide memory mapped
> chip could be best to interface high byte address to low byte address
> and viceversa because adjust byte words by software has an overhead.
>
> >In Little Endian you simply start at D0 and use up to D7, D15
> >or D31 depending on the bus size. 
> >But how does this work in Big Endian?  Will an 8-bit bus run on D24..D31
> >and a 16-bit bus on D16..D31?  Or does the chip solve this internally?
> > 
> >
> In this case an instruction that writes a word or double word to the bus
> will write bytes in little endian order and so you have to manage the
> situation in software. More precisely you have to swap MSB and LSB on a
> word and revert all bytes in a double word and then write them to the bus.
>
> >Best regards,
> >Pieter Verstraelen
> >
> >
> >
> >
> >[Non-text portions of this message have been removed]
> >
> >
> >
> >
> >Yahoo! Groups Links
> >
> >
> >
> >
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> >
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