--- In lpc2000@yahoogroups.com, "stefano_m_a" <stefano_mora@...> wrote: > > > > > Or just: > > > > _irq: > > .word timer0ISR > > > > > > > ... > > > __irq: > > > b timer0ISR > > I must use your solution cause: > - PC is pointing low addresses > - timer0ISR function is located on RAM range > - b instruction is able to jump over 24 bit offsets. > Is it right ? Yes. You could also just have a LDR pc, [pc, #-0x0FF0] at address 0x18, and have the timer0ISR address loaded into the right VICVectAddrxx register. This also works with the handler at any address. Karl Olsen
Message
Re: Handling interrupts on RAM (debug) version
2006-05-31 by Karl Olsen