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Lpc2000

Index last updated: 2026-04-28 23:31 UTC

Message

Re: Handling interrupts on RAM (debug) version

2006-05-31 by stefano_m_a

> Yes.  You could also just have a LDR pc, [pc, #-0x0FF0] at address 
> 0x18, and have the timer0ISR address loaded into the right 
> VICVectAddrxx register.  This also works with the handler at any 
> address.
> 
> Karl Olsen
>

OK, thanks Karl.
Yes, usually the code uses 'LDR pc, [pc, #-0x0FF0]' but now i'm 
investigating why my code does not work. This is driving me crazy ...
I see the call on 0x18 but i can't see the code with GDB (it thinks 
this location is outside my program....), if i step again i fall into 
0x1c (but FIQs are disabled ..), my irq_isr code is not called, into ..
I'm loosing a lot af time on interrupts and i'm not able to solve... :(
--
SM

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