Lpc2000

> >Should I enable the FIFOs (write 1 to U0FCR) before running the
> >interrupts? I seem to be getting by without this up until this 
point.
> 
> I don't see why that would eliminate the problem.  Worse it might 
hide it 
> so that it showed up later under less benign conditions.
> 

Good news...I got communication running alot better after enabling 
FIFOs (U0FCR = 1) at startup. So far, no Rx & Tx glitches yet. Try 
doing the same to see what happens.

For now the LSR mystery is worth forgetting. 


Leighton