Lpc2000

--- In lpc2000@yahoogroups.com, "digtalfreak" <digitalfreak@n...> 
wrote:
> 
> I just looked at the cycle timing specs of the ARM7TDMI-S and I must
> say.. I don't understand it.
> I made the following test:
> - Programm is running in flash
> - MAM is at max speed
> - PLL is set to M = 5 and P = 2 @ 12 MHz Foc -> 60 MHz cclk
> - Pogramm is 100% THUMB, assembler coded
> - r2 holds IO1SET, r0 holds IO1CLR, r1 holds the bit position
> - I am scoping the the following loop:
> 
> loop:
>    str r1, [r0]
>    str r1, [r2]
>    b loop
> 
> The scope shows a frequency of about 1,666 MHz at the output pin. 
With
> some testing, eg doubling one of the str, i figgured out that the b 
is
> nearly done in 1 cclk cycle. But the 1,666 MHz will mean that one 
str
> takes about 18 cclk cycles( also tested with PLL off, same result 
the
> Freq is exactly 1/5).
> Now there are 2 things that I don't understand:
> 1. 18 cycles lookes very long to me. Can that be?
> 1. How can I calculate the exact value of the instructions?

Have you changed the VPB divider from the default 4 to 1?

Karl Olsen