Lpc2000

Thanks, that link helped very much. I also thought about the
pipelining but I din't understand how to get from cycles to needed clocks.

I need to know the timing calculation very exactly. At the example
with the str the cycles, like described at the link, are:

Fetch(1clk)+Decode(1clk)+N-Cycle(2clk)+N-Cycle(4clk)

First N-Cycle is clear to me, its a normal N-Cycle on the AHB.
But the second N-Cycle, targeting a register on VPB, is very unclear
to me. I can't find any documentation of the AHB-VPB Bridge and how it
influences the length of the N-Cycle but I need that for my documentation.

regards

Thomas

--- In lpc2000@yahoogroups.com, Robert Adsett <subscriptions@a...> wrote:
> 
> Just added to the earlier mentioned FAQ.  This is the question I most 
> expected to be asked.
> 
> http://www.open-research.org.uk/ARMuC/index.cgi?LPC2100Tips
> 
> Robert
> 
> " 'Freedom' has no meaning of itself.  There are always restrictions,
> be they legal, genetic, or physical.  If you don't believe me, try to
> chew a radio signal. "
> 
>                          Kelvin Throop, III