> Is it allowed to use a 20MHz osc/crystal with M=3,P=2 to > get a 60MHz cclk? The docs state that cclk must be an > EVEN multiple of fosc. Hopefully that really should read > an INTEGER multiple. I think the PLL documentation would benefit from a re-write ... My understanding is as follows: Cclk (the CPU clock) will be M (an integer value, 1-6) * FOSC Cclk must lie between 10 MHz and 60 MHz Fcco will be M * FOSC * 2 * P (an integer value, 2,4,8 or 16) Fcco must be between 156 MHz and 320 MHz Am I correct? If so, can someone explain to me why P is referred to in the documentation as a divider? Thanks, Michael.
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Re: [lpc2100] PLL
2004-01-06 by Michael J. Pont
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