Lpc2000

----- Original Message ----- 
From: "Michael J. Pont" <Michael.Pont@...>
To: <lpc2100@yahoogroups.com>
Sent: Tuesday, January 06, 2004 3:29 PM
Subject: Re: [lpc2100] PLL


>
> > Is it allowed to use a 20MHz osc/crystal with M=3,P=2 to
> > get a 60MHz cclk?  The docs state that cclk must be an
> > EVEN multiple of fosc.  Hopefully that really should read
> > an INTEGER multiple.
>
>
> I think the PLL documentation would benefit from a re-write ...
>
> My understanding is as follows:
>
> Cclk (the CPU clock) will be M (an integer value, 1-6) * FOSC
>
> Cclk must lie between 10 MHz and 60 MHz
>
> Fcco will be M * FOSC * 2 * P (an integer value, 2,4,8 or 16)
>
> Fcco must be between 156 MHz and 320 MHz
>
>
> Am I correct?
>
> If so, can someone explain to me why P is referred to in the documentation
> as a divider?

Is it a pre-scaler? Makes sense if it just divides by 2, 4 etc.

Leon
--
Leon Heller, G1HSM
Email: aqzf13@...
My low-cost Philips LPC210x ARM development system:
http://www.geocities.com/leon_heller/lpc2104.html