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Lpc2000

Index last updated: 2026-04-28 23:31 UTC

Message

Re: EINT1 and EINT2 problem

2005-01-20 by Richard

Hey Amit,
    Where can we customer types get this new errata?  ;-)

Richard


--- In lpc2000@yahoogroups.com, "Amit" <emailakb@y...> wrote:
> 
> Simon,
> 
> Some questions:
> 
> When you press "stop" on the debugger where is the PC pointing 
to ? 
> (After the stall takes place) Is it held up in an exception 
vector ?
> 
> How are you handling IRQ ? What is the instruction at 0x18?
> 
> Also, Philips posted an errata yesterday on External interrupt 
> registers. 
> 
> Amit
> 
> --- In lpc2000@yahoogroups.com, "itsjustimpossible" <simonjh@b...> 
> wrote:
> > 
> > Hi
> > Has anyone had a problem when using both EINT1 and EINT2 on the 
> > LPC2294. I have them assigned to VIC0 and VIC1. (I also have a 
much 
> > faster seperate FIQ running.)
> > 
> > If I have both the external interrupts enabled the interrupts 
stall 
> > after a few seconds. If I disable one or both, all is well.
> > 
> > I have the same 250uS clock wired to both pins, but EINT1 is 
> > positive edge triggered and EINT2 is negative edge triggered so 
I 
> > can do something on both edges.
> > 
> > Once stalled, if I look in the debugger, both have an interrupt 
> > pending.
> > 
> > I am using the method suggested in the errata to setup the 
> > interrupts to avoid corruption of the VPBDIV.
> > 
> > Any suggestions would be gratefully received.
> > 
> > Many thanks
> > Simon

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