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EINT1 and EINT2 problem

EINT1 and EINT2 problem

2005-01-19 by itsjustimpossible

Hi
Has anyone had a problem when using both EINT1 and EINT2 on the 
LPC2294. I have them assigned to VIC0 and VIC1. (I also have a much 
faster seperate FIQ running.)

If I have both the external interrupts enabled the interrupts stall 
after a few seconds. If I disable one or both, all is well.

I have the same 250uS clock wired to both pins, but EINT1 is 
positive edge triggered and EINT2 is negative edge triggered so I 
can do something on both edges.

Once stalled, if I look in the debugger, both have an interrupt 
pending.

I am using the method suggested in the errata to setup the 
interrupts to avoid corruption of the VPBDIV.

Any suggestions would be gratefully received.

Many thanks
Simon

Re: EINT1 and EINT2 problem

2005-01-19 by Amit

Simon,

Some questions:

When you press "stop" on the debugger where is the PC pointing to ? 
(After the stall takes place) Is it held up in an exception vector ?

How are you handling IRQ ? What is the instruction at 0x18?

Also, Philips posted an errata yesterday on External interrupt 
registers. 

Amit

--- In lpc2000@yahoogroups.com, "itsjustimpossible" <simonjh@b...> 
wrote:
Show quoted textHide quoted text
> 
> Hi
> Has anyone had a problem when using both EINT1 and EINT2 on the 
> LPC2294. I have them assigned to VIC0 and VIC1. (I also have a much 
> faster seperate FIQ running.)
> 
> If I have both the external interrupts enabled the interrupts stall 
> after a few seconds. If I disable one or both, all is well.
> 
> I have the same 250uS clock wired to both pins, but EINT1 is 
> positive edge triggered and EINT2 is negative edge triggered so I 
> can do something on both edges.
> 
> Once stalled, if I look in the debugger, both have an interrupt 
> pending.
> 
> I am using the method suggested in the errata to setup the 
> interrupts to avoid corruption of the VPBDIV.
> 
> Any suggestions would be gratefully received.
> 
> Many thanks
> Simon

Re: [lpc2000] EINT1 and EINT2 problem

2005-01-19 by Bruce Paterson

itsjustimpossible wrote:

> 
> Hi
> Has anyone had a problem when using both EINT1 and EINT2 on the 
> LPC2294. I have them assigned to VIC0 and VIC1. (I also have a much 
> faster seperate FIQ running.)
> 
> If I have both the external interrupts enabled the interrupts stall 
> after a few seconds. If I disable one or both, all is well.
> 
> I have the same 250uS clock wired to both pins, but EINT1 is 
> positive edge triggered and EINT2 is negative edge triggered so I 
> can do something on both edges.

Thinking laterally, Have you tried using just one pin, but in the ISR 
flip the edge polarity bit every time (so you interrupt on both edges) ?
If there is some problem it might be a workaround :)

-- 
Cheers,
Bruce
-------------------------------------------------------------------
     /\\\/\\\/\\\    /   /      Bruce Paterson
    /  \\\ \\\ \\\  /   /    Senior Design Engineer
   /   /\\\/\\\/\\\/   /   8 Anzed Court, Mulgrave, Vic, 3170
  /   /  \\\ \\\ \\\  /  PO Box 4112, Mulgrave, Vic, 3170, Australia
/   /    \\\/\\\ \\\/   Ph: +61 3 8561 4232   Fax: +61 3 9560 9055
       Tele-IP Ltd.      Email: bruce@...    Icq: #32015991
                         WWW:   http://www.tele-ip.com       VK3TJN
-------------------------------------------------------------------

Re: EINT1 and EINT2 problem

2005-01-20 by Richard

Hey Amit,
    Where can we customer types get this new errata?  ;-)

Richard


--- In lpc2000@yahoogroups.com, "Amit" <emailakb@y...> wrote:
> 
> Simon,
> 
> Some questions:
> 
> When you press "stop" on the debugger where is the PC pointing 
to ? 
> (After the stall takes place) Is it held up in an exception 
vector ?
> 
> How are you handling IRQ ? What is the instruction at 0x18?
> 
> Also, Philips posted an errata yesterday on External interrupt 
> registers. 
> 
> Amit
> 
> --- In lpc2000@yahoogroups.com, "itsjustimpossible" <simonjh@b...> 
> wrote:
> > 
> > Hi
> > Has anyone had a problem when using both EINT1 and EINT2 on the 
> > LPC2294. I have them assigned to VIC0 and VIC1. (I also have a 
much 
> > faster seperate FIQ running.)
> > 
> > If I have both the external interrupts enabled the interrupts 
stall 
> > after a few seconds. If I disable one or both, all is well.
> > 
> > I have the same 250uS clock wired to both pins, but EINT1 is 
> > positive edge triggered and EINT2 is negative edge triggered so 
I 
Show quoted textHide quoted text
> > can do something on both edges.
> > 
> > Once stalled, if I look in the debugger, both have an interrupt 
> > pending.
> > 
> > I am using the method suggested in the errata to setup the 
> > interrupts to avoid corruption of the VPBDIV.
> > 
> > Any suggestions would be gratefully received.
> > 
> > Many thanks
> > Simon

Re: EINT1 and EINT2 problem

2005-01-21 by itsjustimpossible

--- In lpc2000@yahoogroups.com, Bruce Paterson <bruce@t...> wrote:
> Thinking laterally, Have you tried using just one pin, but in the 
ISR 
> flip the edge polarity bit every time (so you interrupt on both 
edges) ?
> If there is some problem it might be a workaround :)

Hi
I did think about that initially, but what with the VPBDIV 
corruption etc, I thought that changing the polarity on the fly 
might be a bit more trouble than it was worth. So I sacrificed an 
extra pin to do the second edge.

I could still give it a try and see what happens, I will just set 
the other pin back to GPIO.

cheers
Simon

Re: EINT1 and EINT2 problem

2005-01-21 by itsjustimpossible

Hi
The two IRQ are via the VIC. The instruction at address 0x18 is;

LDR PC,[#-0x0FF0]

which should be fine. All the other IRQs are OK. Once the stall 
occurs the program is still running. The normal code is stepping 
through with no problems, its just that the interrupts are not being 
actioned.

Very odd...

By the way, you mention a new errata posting by Philips. I am having 
trouble finding it, would it be possible to pass on the location?

many thanks
Simon


--- In lpc2000@yahoogroups.com, "Amit" <emailakb@y...> wrote:
> 
> Simon,
> 
> Some questions:
> 
> When you press "stop" on the debugger where is the PC pointing 
to ? 
> (After the stall takes place) Is it held up in an exception 
vector ?
Show quoted textHide quoted text
> 
> How are you handling IRQ ? What is the instruction at 0x18?
> 
> Also, Philips posted an errata yesterday on External interrupt 
> registers. 
> 
> Amit

Re: EINT1 and EINT2 problem

2005-01-21 by Amit

http://groups.yahoo.com/group/lpc2000/message/5132

Check it out.

Amit

--- In lpc2000@yahoogroups.com, "itsjustimpossible" <simonjh@b...> 
wrote:
> 
> Hi
> The two IRQ are via the VIC. The instruction at address 0x18 is;
> 
> LDR PC,[#-0x0FF0]
> 
> which should be fine. All the other IRQs are OK. Once the stall 
> occurs the program is still running. The normal code is stepping 
> through with no problems, its just that the interrupts are not 
being 
> actioned.
> 
> Very odd...
> 
> By the way, you mention a new errata posting by Philips. I am 
having 
Show quoted textHide quoted text
> trouble finding it, would it be possible to pass on the location?
> 
> many thanks
> Simon
> 
> 
> --- In lpc2000@yahoogroups.com, "Amit" <emailakb@y...> wrote:
> > 
> > Simon,
> > 
> > Some questions:
> > 
> > When you press "stop" on the debugger where is the PC pointing 
> to ? 
> > (After the stall takes place) Is it held up in an exception 
> vector ?
> > 
> > How are you handling IRQ ? What is the instruction at 0x18?
> > 
> > Also, Philips posted an errata yesterday on External interrupt 
> > registers. 
> > 
> > Amit

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