I'm working on designing a new project where we need to process 9600bps packets (similar to G3RUH format), we'd like to use the LPC2106 which ought to be fast enough. But I'm having trouble coming up with a suitable ADC. It needs to sample at 48khz, 10 bits are fine, 2 channels. It needs to be consistent (no jitter). I could use a SPI ADC with the ARM as the SPI master, but I'm afraid that other interrupts in the system will effect the sample accuracy (it will also be doing some serial communications and have some timers running) and introduce jitter into sample rate. Ideally the ADC would be a SPI master with its own reference clock, feeding the samples to the ARM with some indication (high bit set/clear?) of which channel the data came from. There are some AKM ADCs/codecs that might work, but their left/right clock would somehow need to be associated with the data -- hard to do if you have a delay in getting to the interrupt to process the data and L/R has already switched to the other channel. Any thoughts? Thanks, Brian -- ----------------------------------------------------- Brian C. Lane (W7BCL) Programmer www.shinemicro.com RF, DSP & Microcontroller Design
Message
ADC Suggestions
2004-02-02 by Brian C. Lane
Attachments
- No local attachments were found for this message.