Lpc2000

Brian C. Lane wrote:
> I'm working on designing a new project where we need to process 9600bps 
> packets (similar to G3RUH format), we'd like to use the LPC2106 which 
> ought to be fast enough. But I'm having trouble coming up with a 
> suitable  ADC. It needs to sample at 48khz, 10 bits are fine, 2 
> channels. It needs to be consistent (no jitter).
> 
> I could use a SPI ADC with the ARM as the SPI master, but I'm afraid 
> that other interrupts in the system will effect the sample accuracy (it 
> will also be doing some serial communications and have some timers 
> running) and introduce jitter into sample rate.

Can you not do the SPI sample activity from a timer interrupt handler, 
assigned to a nice high priority interrupt in that lovely vectored 
interrupt controller, so other timers and serial comms wait for it to 
complete, or will that make it impossible to service the other 
interrupts in time due to the SPI delays?

You could also rig up a system where the timer triggers the SPI action 
to request the sample, with the SPI device interrupting upon completion, 
the handler of which then triggers the SPI write to request the sample 
to be read back, then the next time the handler is called it triggers 
the SPI read of the sample... thus letting other things run. But still 
having the initial timer, and subsequent SPI, interrupts at a high priority.

ABS