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Re: [lpc2000] How do interrupts work?

2005-10-16 by Richard Duits

With everything that generates an interrupt, you have to clear the 
interrupt by reading or writing to a register. For example with the UART 
you clear a data ready interrupt by reading the data. If you cannot 
clear the interrupt (for example a UART transmit holding register emty 
while you have nothing to send), you disable it. If you do not clear or 
disable the interrupt, the interrupt will be called again immidiately 
after you return from it.

Level sensitive interrupts are active if the input pin is low (high if 
INTPOLAR bit is set), edge sensitive interrupts become active on the 
high to low transition (if INTPOLAR bit is clear) of the input pin. All 
internal interrupts are level sensitive. External interrupts are cached 
and converted to level senstive interrupt by the external interrupt 
controller.



Guillermo Prandi wrote:

> Hi! I read every doc I've found and I couldn't get a detailed
> description of the interrupt mechanism in the LPC2XXX. In particular,
> I'm looking for the following:
>
> - What happens to interrupts while they're disabled? Do they
> get "cached"? I mean, if I'm in the middle of processing a UART0
> interrupt and UART1 receives a new character, I'd probably have the
> interrupts disabled. Will I miss the interrupt?
>
> - Provided the interrupts get chached while disabled somehow... That
> would mean that they will trigger as soon as they're enabled, isn't it?
> I plan to keep interrupts disabled while processing other interrupts;
> could that work?
>
> - What's the exact difference between edge and level triggered
> interrupts?
>
> Thanks in advance
>
>
>
>
>
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