Yahoo Groups archive

Lpc2000

Index last updated: 2026-04-28 23:31 UTC

Thread

real time clock

real time clock

2006-03-07 by ebarker123

I'm using the lpc2138:

Q. How do you read the clock registers without risk of 'rollover'?

For example, I know of clocks that have a dual-port ram between the
actual internal clock registers and the registers that appear in the
address space. You can disable/enable updating the dual-port ram,
thereby allowing the muliple clock registers to be read without risk
of 'rollover'.

As best as I can determine, there are bits that will start/stop the
lpc2138 clock. Are these really bits that enable/disable a dual port
ram, or does it really stop the clock?

It it really stops the clock then that is unfortunate.

A workaround is to run a sub-second timer routine that reads the
second counter, waiting for it to increment, then you can read the
rest of the consolidated registers without fear of rollover.

ebarker123

Re: real time clock

2006-03-07 by unity0724

Umm...  Why not just setup the second tick interrupt from RTC??
Store/Update Time/Date value every second to somewhere.

Background task (Non-ISR code) remembers to disable interrupt
when reading the Time/Date data structure..    Help??  :)

--- In lpc2000@yahoogroups.com, "ebarker123" <ebarker123@...> wrote:
Show quoted textHide quoted text
> A workaround is to run a sub-second timer routine that reads the
> second counter, waiting for it to increment, then you can read the
> rest of the consolidated registers without fear of rollover.
> 
> ebarker123

Re: real time clock

2006-03-07 by ebarker123

That would certainly solve the problem. What I'm really interested in
knowing (so that probably makes this a Phillips question) is whether
or not the enable is opens and closes a dual-port ram, or does it
realy stop the clock.

Ed


--- In lpc2000@yahoogroups.com, "unity0724" <unity0724@...> wrote:
Show quoted textHide quoted text
>
> Umm...  Why not just setup the second tick interrupt from RTC??
> Store/Update Time/Date value every second to somewhere.
> 
> Background task (Non-ISR code) remembers to disable interrupt
> when reading the Time/Date data structure..    Help??  :)
> 
> --- In lpc2000@yahoogroups.com, "ebarker123" <ebarker123@> wrote:
> > A workaround is to run a sub-second timer routine that reads the
> > second counter, waiting for it to increment, then you can read the
> > rest of the consolidated registers without fear of rollover.
> > 
> > ebarker123
>

Move to quarantaine

This moves the raw source file on disk only. The archive index is not changed automatically, so you still need to run a manual refresh afterward.