Lpc2000

I have a newbie question.  In the following code
 
    void ADC0Handler (void) __irq
 
What does __irq do?  I've never seen this before.  It comes from the 
Kiel ADC sample listed Philips website.
Thanks,
Dewayne

Hi,

__irq is telling the compiler that the  "void ADC0Handler (void)" is 
not an ordinary function that you can call but an interrupt handler.
Typically interrupt handlers are getting called in response to some
hardware event, in this case the ADC0Handler will service interrupts
generated by the ADC0 unit.  If you follow the code you will notice
that the  ADC0Handler is installed as the irq handler by the
install_irq function called by the ADCInit. If you are curious, you
will notice that install_irq takes address of the ADC0Handler and
stuffs it into an empty  slot in VIC (Vector Interrupt Handler)
associating it with the interrupt number (channel) corresponding to
the ADC0 unit.

 So the question is how does the ADC0Handler gets called if it is
never called directly from the code?  Consider the situation when ADC0
is done with the A/D conversion and wants attention from the CPU.  To
get it,  ADC  asks VIC to generate interrupt on VIC channel ADC0_INT ,
in turn VIC will look through all of the slots for a matching handler.
 If it finds one it will then interrupt the CPU and make it jump to
the address in the slot which in this case will be ADC0Handler! 

 Since, the interrupt handler can be called at any time the compiler
needs to know that to generate code that is a bit different then for
the normal functions and __irq is doing that. 

 I hope this will help you a bit but this is just a beginning and as
always devil is in (a lot of) details that I did not mention. If you
want to learn more check  ARM  and Philips  documentation, look for
exception handling and interrupts. 

thanks,
elektrknight




--- In lpc2000@yahoogroups.com, "heedaf" <ruffellfamily@...> wrote:

>
> I have a newbie question.  In the following code
>  
>     void ADC0Handler (void) __irq
>  
> What does __irq do?  I've never seen this before.  It comes from the 
> Kiel ADC sample listed Philips website.
> Thanks,
> Dewayne
>

The Keil CA Compiler implements the keywords __irq and __fiq. With the __fiq keyword the compiler does not save the CPU registers R8 - R12, since the ARM CPU implements separate registers in the FIQ mode.

  This is what the keil help says. Above that I do not know anything more than the obvious fact that __irq tells the function that it is an irq interrupt. Then you may ask what is the use of the register VICIntSelect. I too dont know the answer for that. Anyways, hope my effort was of any help.
   
  Regards,
  Jack.
heedaf <ruffellfamily@...> wrote:
  I have a newbie question.  In the following code

    void ADC0Handler (void) __irq

What does __irq do?  I've never seen this before.  It comes from the 
Kiel ADC sample listed Philips website.
Thanks,
Dewayne





  SPONSORED LINKS 
        Microcontrollers   Microprocessor   Intel microprocessors     Pic microcontrollers 
    
---------------------------------
  YAHOO! GROUPS LINKS 

    
    Visit your group "lpc2000" on the web.
    
    To unsubscribe from this group, send an email to:
 lpc2000-unsubscribe@yahoogroups.com
    
    Your use of Yahoo! Groups is subject to the Yahoo! Terms of Service. 

    
---------------------------------
  



		
---------------------------------
 Yahoo! Mail
 Use Photomail to share photos without annoying attachments.

[Non-text portions of this message have been removed]

I am guessing that it's simply a keyword to inform the compiler gracefully
that it will need to apply a sub of 4/8 bytes from the Link Register before
it returns from the IRQ function.

The reasoning being that having entered an FIQ/IRQ the link register will
contain the address of the discarded instruction + 4, this way the compiler
understands it needs to put in a SUBS R15, R14, #4 instruction rather than
simply copying R15 back onto R14 as per a SWI. That said in the case of a
data abort the exception will actually have occured one instruction after
the execution of the instruction that threw the exception, in this case we
need to go back 2 instructions and therefore apply: SUBS R15, R14, #8.
Following this its plain sailing - simply restoring the user mode and
copying the SPSR to the CPSR and we're back to processing user code at the
point where we were interrupted.

Andy

-----Original Message-----
From: lpc2000@yahoogroups.com [mailto:lpc2000@yahoogroups.com]On Behalf
Of Jack Key
Sent: 17 March 2006 13:28
To: lpc2000@yahoogroups.com
Subject: Re: [lpc2000] C question


The Keil CA Compiler implements the keywords __irq and __fiq. With the __fiq
keyword the compiler does not save the CPU registers R8 - R12, since the ARM
CPU implements separate registers in the FIQ mode.

  This is what the keil help says. Above that I do not know anything more
than the obvious fact that __irq tells the function that it is an irq
interrupt. Then you may ask what is the use of the register VICIntSelect. I
too dont know the answer for that. Anyways, hope my effort was of any help.

  Regards,
  Jack.
heedaf <ruffellfamily@...> wrote:
  I have a newbie question.  In the following code

    void ADC0Handler (void) __irq

What does __irq do?  I've never seen this before.  It comes from the
Kiel ADC sample listed Philips website.
Thanks,
Dewayne





  SPONSORED LINKS
        Microcontrollers   Microprocessor   Intel microprocessors     Pic
microcontrollers

---------------------------------
  YAHOO! GROUPS LINKS


    Visit your group "lpc2000" on the web.

    To unsubscribe from this group, send an email to:
 lpc2000-unsubscribe@yahoogroups.com

    Your use of Yahoo! Groups is subject to the Yahoo! Terms of Service.


---------------------------------





---------------------------------
 Yahoo! Mail
 Use Photomail to share photos without annoying attachments.

[Non-text portions of this message have been removed]




Yahoo! Groups Links

So is the "__" in __irq specific to the compiler since it gives me 
an error in CrossStudio?  

--- In lpc2000@yahoogroups.com, "Andrew Berney" <amb@...> wrote:
>
> I am guessing that it's simply a keyword to inform the compiler 
gracefully
> that it will need to apply a sub of 4/8 bytes from the Link 
Register before
> it returns from the IRQ function.
> 
> The reasoning being that having entered an FIQ/IRQ the link 
register will
> contain the address of the discarded instruction + 4, this way the 
compiler
> understands it needs to put in a SUBS R15, R14, #4 instruction 
rather than
> simply copying R15 back onto R14 as per a SWI. That said in the 
case of a
> data abort the exception will actually have occured one 
instruction after
> the execution of the instruction that threw the exception, in this 
case we
> need to go back 2 instructions and therefore apply: SUBS R15, R14, 
#8.
> Following this its plain sailing - simply restoring the user mode 
and
> copying the SPSR to the CPSR and we're back to processing user 
code at the
> point where we were interrupted.
> 
> Andy
> 
> -----Original Message-----
> From: lpc2000@yahoogroups.com [mailto:lpc2000@yahoogroups.com]On 
Behalf
> Of Jack Key
> Sent: 17 March 2006 13:28
> To: lpc2000@yahoogroups.com
> Subject: Re: [lpc2000] C question
> 
> 
> The Keil CA Compiler implements the keywords __irq and __fiq. With 
the __fiq
> keyword the compiler does not save the CPU registers R8 - R12, 
since the ARM
> CPU implements separate registers in the FIQ mode.
> 
>   This is what the keil help says. Above that I do not know 
anything more
> than the obvious fact that __irq tells the function that it is an 
irq
> interrupt. Then you may ask what is the use of the register 
VICIntSelect. I
> too dont know the answer for that. Anyways, hope my effort was of 
any help.
> 
>   Regards,
>   Jack.
> heedaf <ruffellfamily@...> wrote:
>   I have a newbie question.  In the following code
> 
>     void ADC0Handler (void) __irq
> 
> What does __irq do?  I've never seen this before.  It comes from 
the
> Kiel ADC sample listed Philips website.
> Thanks,
> Dewayne
> 
> 
> 
> 
> 
>   SPONSORED LINKS
>         Microcontrollers   Microprocessor   Intel 
microprocessors     Pic
> microcontrollers
> 
> ---------------------------------
>   YAHOO! GROUPS LINKS
> 
> 
>     Visit your group "lpc2000" on the web.
> 
>     To unsubscribe from this group, send an email to:
>  lpc2000-unsubscribe@yahoogroups.com
> 
>     Your use of Yahoo! Groups is subject to the Yahoo! Terms of 
Service.

> 
> 
> ---------------------------------
> 
> 
> 
> 
> 
> ---------------------------------
>  Yahoo! Mail
>  Use Photomail to share photos without annoying attachments.
> 
> [Non-text portions of this message have been removed]
> 
> 
> 
> 
> Yahoo! Groups Links
>

At 08:24 PM 3/18/2006 +0000, heedaf wrote:
>So is the "__" in __irq specific to the compiler since it gives me
>an error in CrossStudio?

Actually the whole thing is compiler specific.  One of the reasons I write 
my own interrupt prologs in and epilogs in assembly.  The main reasons 
being control and safety.

Robert

" 'Freedom' has no meaning of itself.  There are always restrictions,   be 
they legal, genetic, or physical.  If you don't believe me, try to chew a 
radio signal. "  -- Kelvin Throop, III
http://www.aeolusdevelopment.com/

hey friends,
  I want to know a fact...
  what is the difference between a compiler and a cross-compiler
  please help me find out...
  Thanks...
  Umang Malhotra

		
---------------------------------
 Yahoo! Mail
 Use Photomail to share photos without annoying attachments.

[Non-text portions of this message have been removed]

----- Original Message ----- 

From: <malhotra_umang@...>
To: <lpc2000@yahoogroups.com>
Sent: Monday, March 20, 2006 3:33 PM
Subject: [lpc2000] Compiler vs cross compiler


> hey friends,
>  I want to know a fact...
>  what is the difference between a compiler and a cross-compiler
>  please help me find out...

A cross-compiler generates code for a different CPU than the the one that it 
is running on. Most compilers for embedded systems are cross-compilers.

Leon

Leon, 

> > hey friends,
> >  I want to know a fact...
> >  what is the difference between a compiler and a cross-compiler
> >  please help me find out...
> 
> A cross-compiler generates code for a different CPU than the 
> the one that it 
> is running on. Most compilers for embedded systems are 
> cross-compilers.

Actually, not quite true.

There are native compilers (aka hosted compilers in ISO C speak) which
generate code for direct execution on the processor and operating system
on which the compiler is hosted.  For example, MS VC generating Win32
apps is a native compiler, as is the Ultra compiler on OS-9 which
generates code for 68K/386/PPC-based OS-9 systems, as is the classic cc
compiler shipped with many older Unicies.

A cross compiler generates code that cannot be directly executed on the
host because either (a) it targets a different processor or (b) it
targets a different OS.  An example of this type of compiler is your
regular embedded C compiler provided by IAR, RAL, GHS, and so on.  But
there are (many) non-commercial never-to-be-seen cross compilers that
are used internally (for instance, I always used to build our Modula-2
products on a Sun-3, but they targeted transputers, ARMs, 386s and 68Ks
on various operating systems, I never built them native).

There are also things that are difficult to categorize, such as Apple's
recent introduction of Universal Binaries, for instance.

--
Paul Curtis, Rowley Associates Ltd   http://www.rowley.co.uk 
CrossWorks for MSP430, ARM, AVR and now MAXQ processors

Paul Curtis wrote:

>Leon, 
>
>  
>
>>>hey friends,
>>> I want to know a fact...
>>> what is the difference between a compiler and a cross-compiler
>>> please help me find out...
>>>      
>>>
>>A cross-compiler generates code for a different CPU than the 
>>the one that it 
>>is running on. Most compilers for embedded systems are 
>>cross-compilers.
>>    
>>
>
>Actually, not quite true.
>
>There are native compilers (aka hosted compilers in ISO C speak) which
>generate code for direct execution on the processor and operating system
>on which the compiler is hosted.  For example, MS VC generating Win32
>apps is a native compiler, as is the Ultra compiler on OS-9 which
>generates code for 68K/386/PPC-based OS-9 systems, as is the classic cc
>compiler shipped with many older Unicies.
>
>A cross compiler generates code that cannot be directly executed on the
>host because either (a) it targets a different processor or (b) it
>targets a different OS.  An example of this type of compiler is your
>regular embedded C compiler provided by IAR, RAL, GHS, and so on.  But
>there are (many) non-commercial never-to-be-seen cross compilers that
>are used internally (for instance, I always used to build our Modula-2
>products on a Sun-3, but they targeted transputers, ARMs, 386s and 68Ks
>on various operating systems, I never built them native).
>
>  
>
Heh, you should try it sometime, it will quickly convince you that a 
compiler running natively on an embedded platform is a horrible idea. 
:P  I tried that with an SA1100 running @ 166MHz, terribly slow!

TomW


-- 
Tom Walsh - WN3L - Embedded Systems Consultant
http://openhardware.net, http://cyberiansoftware.com
"Windows? No thanks, I have work to do..."
----------------------------------------------------

malhotra_umang@... ha scritto:
> hey friends,
>   I want to know a fact...
>   what is the difference between a compiler and a cross-compiler
>   please help me find out...
>   Thanks...
>   Umang Malhotra
>   
A cross compiler is a compiler that produce object code for a different 
cpu/calculator then the cpu of the calculator where it is runnig.
So if you have a compiler running on your PC that may produce object 
code for an ARM processor, that compiler is a cross compiler.
> 		
> ---------------------------------
>  Yahoo! Mail
>  Use Photomail to share photos without annoying attachments.
>
> [Non-text portions of this message have been removed]
>
>
>
>  
> Yahoo! Groups Links
>
>
>
>  
>
>
>
>
>   


  ----------

No virus found in this outgoing message.
Checked by AVG Free Edition.
Version: 7.1.385 / Virus Database: 268.2.4/283 - Release Date: 16/03/2006


[Non-text portions of this message have been removed]

>>hey friends,
>>  I want to know a fact...
>>  what is the difference between a compiler and a cross-compiler
>>  please help me find out...
>>  Thanks...

Its what you get when you feed your compiler bad code.

:)

Hi friends..
  I have a few more questions..
  
1. Differences between SPI and I2C serial interfaces .
2. what is pipelining in embedded
3. what is difference b/w harward and von-newman architectures.
4. RISC vs CISC
5. Interrupt latency...

			
---------------------------------
 Yahoo! Mail
 Use Photomail to share photos without annoying attachments.

[Non-text portions of this message have been removed]

malhotra_umang@... ha scritto:
> Hi friends..
>   I have a few more questions..
>   
> 1. Differences between SPI and I2C serial interfaces .
> 2. what is pipelining in embedded
> 3. what is difference b/w harward and von-newman architectures.
> 4. RISC vs CISC
> 5. Interrupt latency...
>   
let study, learn and study....good luck
> 			
> ---------------------------------
>  Yahoo! Mail
>  Use Photomail to share photos without annoying attachments.
>
> [Non-text portions of this message have been removed]
>
>
>
>  
> Yahoo! Groups Links
>
>
>
>  
>
>
>
>
>
>   


  ----------

No virus found in this outgoing message.
Checked by AVG Free Edition.
Version: 7.1.385 / Virus Database: 268.2.6/286 - Release Date: 20/03/2006


[Non-text portions of this message have been removed]

Hi, 

> 1. Differences between SPI and I2C serial interfaces .
> 2. what is pipelining in embedded
> 3. what is difference b/w harward and von-newman architectures.
> 4. RISC vs CISC
> 5. Interrupt latency...

Please, do your own assignments.

--
Paul Curtis, Rowley Associates Ltd   http://www.rowley.co.uk 
CrossWorks for MSP430, ARM, AVR and now MAXQ processors

malhotra_umang@... wrote:

>Hi friends..
>  I have a few more questions..
>  
>1. Differences between SPI and I2C serial interfaces .
>2. what is pipelining in embedded
>3. what is difference b/w harward and von-newman architectures.
>4. RISC vs CISC
>5. Interrupt latency...
>
>  
>
Ah, nearly April, time for the students to be finishing up on projects...

TomW


-- 
Tom Walsh - WN3L - Embedded Systems Consultant
http://openhardware.net, http://cyberiansoftware.com
"Windows? No thanks, I have work to do..."
----------------------------------------------------

Em Ter 21 Mar 2006 10:58, malhotra_umang@... escreveu:
> Hi friends..
>   I have a few more questions..
>
> 1. Differences between SPI and I2C serial interfaces .

I2C - Multiple devices on one bus, SPI - one device and one master 
I2C - Only two signals (data & clock), SPI - three signals (but in some 
situations can be only two)
I2C - Not so fast, SPI - a little bit more fast
I2C - Not so easy protocol, SPI - very easy protocol (I made a SPI port in 
firmware because I needed to interface two SPI devices in one LPC2106)

> 2. what is pipelining in embedded

Take a look at "Insiders Guide to LPC2106

> 3. what is difference b/w harward and von-newman architectures.

Damn, search for a book.

> 4. RISC vs CISC

Are you kidding?

> 5. Interrupt latency...

I'm tired.

Xtian Xultz ha scritto:
> SPI - one device and one master

SPI: More devices and one master

> SPI - very easy protocol (I made a SPI port in 
> firmware because I needed to interface two SPI devices in one LPC2106)

I think that is not a good solution to implement a software SPI on GPIOs.
I have driven 8 devices with only one SPI port of LPC2106 only enabling
CS of related device
And I have tested SPI comunication up to 11 Mbps!

Try Google my friend.  A simple search on "von neuman"
returns some of the information that you require.  Try
this:

http://www.bores.com/courses/intro/chips/6_mem.htm

--- malhotra_umang@... wrote:

> Hi friends..
>   I have a few more questions..
>   
> 1. Differences between SPI and I2C serial interfaces
> .
> 2. what is pipelining in embedded
> 3. what is difference b/w harward and von-newman
> architectures.
> 4. RISC vs CISC
> 5. Interrupt latency...
> 
> 			
> ---------------------------------
>  Yahoo! Mail
>  Use Photomail to share photos without annoying
> attachments.
> 
> [Non-text portions of this message have been
> removed]
> 
> 


__________________________________________________
Do You Yahoo!?
Tired of spam?  Yahoo! Mail has the best spam protection around 
http://mail.yahoo.com

malhotra_umang@... wrote:

>Hi friends..
>  I have a few more questions..
>  
>1. Differences between SPI and I2C serial interfaces .
>2. what is pipelining in embedded
>3. what is difference b/w harward and von-newman architectures.
>4. RISC vs CISC
>5. Interrupt latency...
>
Not while I'm busy...

Al

>			
>---------------------------------
> Yahoo! Mail
> Use Photomail to share photos without annoying attachments.
>
>[Non-text portions of this message have been removed]
>
>
>
> 
>Yahoo! Groups Links
>
>
>
> 
>
>
>
>
>
>  
>

1. SPI is a four-wire interface, I2C is a two-wire interface.
Check the Philips website for a complete description for the I2C 
interface. The SPI interface is very much like a simple 8-bit shift 
register with parallel load.

2. Read this article! http://en.wikipedia.org/wiki/Pipeline_(computer)

3. Both architectures address how data is moved to/from the execution 
unit. Harvard used multiple busses, (high connectivity), von-Neumann 
uses single bus, (low connectivity). Harvard is used in devices such 
as DSP's, 8051. von-Neumann is typically used by PowerPC type 
processors.

4. RISC = Reduced Instruction Set Computing; CISC = Complex 
Instruction Set Computing. Google RISC and CISC, or enter these 
acronyms in Wikipedia; www.wikipedia.org

5. Interrupt latency == the amount of time it takes for the silicon 
state machine to pre-empt the current process to enter into the 
interrupt condition. It can also mean the amount of time it takes to 
process the interrupt. It has also been used to describe the amount of 
time it takes to save/restore the context.

Now That I Have Entertained You ...> PLEASE find the information and 
learn this stuff yourself!!!

Ken Wada

--- In lpc2000@yahoogroups.com, <malhotra_umang@...> wrote:

>
> Hi friends..
>   I have a few more questions..
>   
> 1. Differences between SPI and I2C serial interfaces .
> 2. what is pipelining in embedded
> 3. what is difference b/w harward and von-newman architectures.
> 4. RISC vs CISC
> 5. Interrupt latency...
> 
> 			
> ---------------------------------
>  Yahoo! Mail
>  Use Photomail to share photos without annoying attachments.
> 
> [Non-text portions of this message have been removed]
>

Paul Curtis wrote:

>Hi, 
>
>  
>
>>1. Differences between SPI and I2C serial interfaces .
>>2. what is pipelining in embedded
>>3. what is difference b/w harward and von-newman architectures.
>>4. RISC vs CISC
>>5. Interrupt latency...
>>    
>>
>
>Please, do your own assignments.
>
>  
>
Interesting to note just how many people on this list were eager to help 
him with his college paper...

TomW


-- 
Tom Walsh - WN3L - Embedded Systems Consultant
http://openhardware.net, http://cyberiansoftware.com
"Windows? No thanks, I have work to do..."
----------------------------------------------------

Em Ter 21 Mar 2006 12:08, FabioDB escreveu:
> Xtian Xultz ha scritto:
> > SPI - one device and one master
>
> SPI: More devices and one master
>
> > SPI - very easy protocol (I made a SPI port in
> > firmware because I needed to interface two SPI devices in one LPC2106)
>
> I think that is not a good solution to implement a software SPI on GPIOs.
> I have driven 8 devices with only one SPI port of LPC2106 only enabling
> CS of related device
> And I have tested SPI comunication up to 11 Mbps!

I understand, but my problem is that my SPI devices are 25 cm away (in another 
board) from the board with my uC. So, I have two boards with SPI devices 
attached to my CPU board, with flat cables, and I could not have another line 
in the flat cable with the CS signal, so, I needed to write the SPI protocol 
in firmware...