Lpc2000

> How about DMA controller (say 4 channel) period.?
>
> But while we're on the subject of crappy or non existent peripherals...
>
> What we really want in terms of Serial ports, Sensible  I/O 
> configuartion, is something more like what Hitachi (Renesas) have 
> always had (SH1, SH2 H8/300H etc). The peripherals are rich, extremely 
> flexible, and always perform 100% as per data sheet - they are always 
> logically thought out. You can start reading a section on a particular 
> peripheral, and guess the rest, because the design is designed by 
> engineers who care. The peripherals are beautiful. On most Renesas 
> MCUs  you can DMA from any peripheral to any other. I've worked on 
> many (approx 20)  H8/500 H8/300H, SH7032 SH7043 SH7709 projects and I 
> can't remember a single erata sheet. The chips must have been tested 
> to death, and were a dream to work with. My experience with Philips is 
> a lot different, but I am told, 'well that's just Philips for you, If 
> you want chips that work as per manual, and are well documented, stick 
> with Hitachi...'
>
> But...the LPC2xxx is temping for new designs, because of lower cost, 
> and of course they're based on ARM - you can always migrate to other 
> ARMs without wasting too much of  your investment in tools, time, and 
> energy.
>
> The ideal chip:  ARM core but with Renesas style peripherals.
>
> If Renesas ever launched a new family of MCU with ARM cores, eveyone 
> other supplier would get a run for their money...
>
> Jane
>
> Robert Adsett wrote:
>
>> At 02:10 PM 4/14/05 -0500, Bill Knight wrote:
>> >One small feature I would like is to have an interrupt generated as
>> >the THRE interrupt is enabled, if the THRE bit is already set.  This
>> >allows characters to be placed into an ouput queue and the THRE
>> >interrupt enabled as a means of both starting a transmission as well
>> >as adding characters to a transmission in progress.  It also allows
>> >the forground process to do it without ever disabling global
>> >interrupts.
>>
>> While we're at it, how about a pseudo-DMA process to deal with the
>> I/O?  That would reduce/eliminate the need for FIFO's.
>>
>> Robert
>>
>> " 'Freedom' has no meaning of itself.  There are always 
>> restrictions,   be
>> they legal, genetic, or physical.  If you don't believe me, try to 
>> chew a
>> radio signal. "  -- Kelvin Throop, III
>> http://www.aeolusdevelopment.com/
>>
>
>

On 15 Apr 2005 at 0:09, Jane Highland wrote:

> 
> 
> > How about DMA controller (say 4 channel) period.?
> >
> > But while we're on the subject of crappy or non existent
> > peripherals...
> >
> > What we really want in terms of Serial ports, Sensible  I/O 
> > configuartion, is something more like what Hitachi (Renesas) have
> > always had (SH1, SH2 H8/300H etc). The peripherals are rich,
> > extremely flexible, and always perform 100% as per data sheet - they
> > are always logically thought out. You can start reading a section on
> > a particular peripheral, and guess the rest, because the design is
> > designed by engineers who care. The peripherals are beautiful. On
> > most Renesas MCUs  you can DMA from any peripheral to any other.
> > I've worked on many (approx 20)  H8/500 H8/300H, SH7032 SH7043
> > SH7709 projects and I can't remember a single erata sheet. The chips
> > must have been tested to death, and were a dream to work with. My
> > experience with Philips is a lot different, but I am told, 'well
> > that's just Philips for you, If you want chips that work as per
> > manual, and are well documented, stick with Hitachi...'
> >
> > But...the LPC2xxx is temping for new designs, because of lower cost,
> > and of course they're based on ARM - you can always migrate to other
> > ARMs without wasting too much of  your investment in tools, time,
> > and energy.
> >
> > The ideal chip:  ARM core but with Renesas style peripherals.
> >
> > If Renesas ever launched a new family of MCU with ARM cores, eveyone
> > other supplier would get a run for their money...
> >
> > Jane

The Motorola / Freescale peripherals are also extremely well thought out. Very flexible,
but clear and easy to get the basics going. So far only one of their ARM MCUs are 
available for general customers, but at least it is quite feature rich.

Regards
  Anton Erasmus



> > Robert Adsett wrote:
> >
> >> At 02:10 PM 4/14/05 -0500, Bill Knight wrote:
> >> >One small feature I would like is to have an interrupt generated
> >> >as the THRE interrupt is enabled, if the THRE bit is already set. 
> >> >This allows characters to be placed into an ouput queue and the
> >> >THRE interrupt enabled as a means of both starting a transmission
> >> >as well as adding characters to a transmission in progress.  It
> >> >also allows the forground process to do it without ever disabling
> >> >global interrupts.
> >>
> >> While we're at it, how about a pseudo-DMA process to deal with the
> >> I/O?  That would reduce/eliminate the need for FIFO's.
> >>
> >> Robert
> >>
> >> " 'Freedom' has no meaning of itself.  There are always 
> >> restrictions,   be
> >> they legal, genetic, or physical.  If you don't believe me, try to
> >> chew a radio signal. "  -- Kelvin Throop, III
> >> http://www.aeolusdevelopment.com/
> >>
> >
> >
> 
> 
> 
> 
> 
> Yahoo! Groups Links
> 
> 
> 
> 
> 
> 
> 

-- 
A J Erasmus