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Re: [Doepfer_a100] Re: clock division: am i missing something?

2008-02-28 by Florian Anwander

Hi Stuart

>>Stepnumber  1 2 3 4 5 6 7 8
>>      clock .1.1.1.1.1.1.1.1.
>>         /2 .11..11..11..11..
>>         /4 .1111....1111....
> couldn't follow that (are the dots zeros?) but this...
Yes. I used dots instead of zeros because its more readable.


>>And the best thing for percussion triggering would be
>>
>>Stepnumber  1 2 3 4 5 6 7 8
>>      clock .1.1.1.1.1.1.1.1.
>>         /2 .1...1...1...1...
>>         /3 .1.....1.....1...
>>         /4 .1.......1.......
> 
>  
> ...is what i mean. all gates (or trigers) are on when the start order
> comes. if the clock is sending 16ths, then the /2 output is sending
> 8ths etc. 
> why would this need a lot of hardware? 
you need for each stage an additional inverter and an AND.

> if a device is designed to go high on
> the first trigger and low on the second, then all you need is a chain
> of these devices, with a tap after each one for the relevant output.
Thats a nice thought, but thats not how these divider chips are built. 
That what you mean would require a dedicated RS-Flipflop with all 
outputs available for each stage. The divider ICs as used in the A-160 
have a chain of RS-Flipflops, but they are connected in the wrong way 
with each other (if its of interest I can post details). So you'd need 
eight Divider ICs plus two 4xAND-Chips for this, where the standard 
A-160 goes with one chip - and with that you still do not have the 
divide by three part.

Florian

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