68300

Hello everyone,
 
I don't believe that Mr. Yablonski's schematic came through.  
 
You might want to log onto the Motorola Web site ( www.motorola.com <http://www.motorola.com> )  and go to Semiconductors and then search for M68331/332TUT/D.  This shows various methods of connecting 8-bit devices to the 683xx family to form both 8- and 16-bit structures.  It is written by an totally cool dude.  Look on pages 20 - 23.
 
Regards,
 
Charlie

-----Original Message-----
From: Robert Yablonski [mailto:yabo@...]
Sent: Friday, February 20, 2004 9:23 AM
To: 68300@yahoogroups.com
Subject: Re: [68300] Chip select timing problem


Check the attached schematic.

R. Yablonski


At 04:41 PM 2/20/04 +0530, you wrote:
>Hi All,
>       I am using a 68332 interfaced with a memory bank
>comprising of two HM628512 RAMs ( 70 nS). The chip selects
>of the two RAMs are grounded and the OE and WE of the RAMs
>are being controlled by individual chipselects.
>
>CS0  ----> Odd byte Output Enable
>CS1  ----> Odd byte Write Enable
>CS2  ----> Even byte Output Enable
>CS10 ----> Even byte Write Enable
>
>As this is an obvious waste of chip selects and now that I
>am running short of chip selects, I wish to use only one
>chip select in the place of four.
>
>
>The equations for the OE and WE are as follows
>
>" Even byte Read signal equation
>   RDEVEN  =     (!RW) # A0  # (SIZ0 & SIZ1) # CS;
>
>
>" Even byte Write signal equation
>   WREVEN  =     RW # A0  # (SIZ0 & SIZ1) # CS;
>
>
>" Odd byte Read signal equation
>   RDODD   =     (!RW) # (!A0 & SIZ0) # (SIZ0 & SIZ1) # (A0
>& SIZ1) # (A0 & !SIZ0) # CS;
>
>
>" Odd byte Write signal equation
>   WRODD =       RW # (!A0 & SIZ0) # (SIZ0 & SIZ1) # (A0 &
>SIZ1) # (A0 & !SIZ0) # CS;
>
>
>   The chip enable pin on the RAMs are grounded as usual but
>the problem that I am now facing is that the RAMs do not
>work as expected which probably may be due to some mismatch
>in timing. I am using a Lattice CPLD of 5 nS speed grade to
>implement the above logic.
>
>   Can any body suggest as to what may be wrong with my
>scheme or the implementation of the logic?
>
>    It would be a great help if anybody could suggest a
>better and alternate way of doing the same.
>
>Thanks & Regards,
>Philip Jones,
>Engineer,
>R&D Department,
>ID Technologies. (A division of mark elektriks)
>============================================================
>B1/1, Sai Sahawas Apt.,  | Phone: +91-20-4003315, 4007158
>Oppo. Corporation Bank,  | TeleFax: +91-20-5410479
>Maharshi Karvenagar,     | Email: development@...
>Hingne (Bk),             | www.markelektriks.com
>Pune - 411052. India.    |
>============================================================
>
>
>
>
>---------------------------------------------------To learn more about 
>Motorola Microcontrollers, please visit
> http://www.motorola.com/mcu <http://www.motorola.com/mcu> 
>
>learn more about Motorola Microcontrollers, please visit
> http://www.motorola.com/mcu <http://www.motorola.com/mcu> 
>
>
>Yahoo! Groups Links
>
>
>
>
Sincerely,

Robert E. Yablonski


Hunt Dabney & Associates
Electronic System Development and Design
--------------------------------------------------------------------
http://www.huntdabney.com <http://www.huntdabney.com> 
fax: (714) 540-8131



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---------------------------------------------------To learn more about Motorola Microcontrollers, please visit
http://www.motorola.com/mcu <http://www.motorola.com/mcu> 

learn more about Motorola Microcontrollers, please visit
http://www.motorola.com/mcu <http://www.motorola.com/mcu> 





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