RE: [68300] Trouble programming TPU
2003-08-11 by Melear Charles-rdph40
Rowen, The registers that are used to set up the TPU are at a base offset of $ff fe00. This is where the module configuration register, the Channel Function
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Trouble programming TPU
2003-08-11 by Rowen
Hello all, I m currently working on a project that involves a MC68332 in which I need it to be able to read the length of pulses using its TPU lines. However I
test
2003-07-22 by Dimiter Popoff
please ignore this message. Dimiter
RE: [68300] Re: Downloading S2 using ICD32 BDM
2003-07-21 by Melear Charles-rdph40
Remko, The message about CS0 is the only activew chip select is actually a prompt message that the PE software sends out on boot up to remind the user that
RE: [68300] Re: Downloading S2 using ICD32 BDM
2003-07-18 by Remko Galama
Charlie, or anyone else for that matter. If at anytime you do remember some more about the message cs0 is the only active chip select any information would
RE: [68300] Re: Downloading S2 using ICD32 BDM
2003-07-18 by Melear Charles-rdph40
Remko, I don t know the answer about the unidirection port. I know that with the later operating systems, FREEZE would not get recognized on the parallel port
Re: Downloading S2 using ICD32 BDM
2003-07-18 by remkomg77
Hi Charles, the funny thing is that the chip selects are set up but after a few tries the debugger gives an error message saying only cs0 is active. However i
RE: [68300] Downloading S2 using ICD32 BDM
2003-07-18 by Melear Charles-rdph40
Remko, Here are some things to look for: 1. Are you downloading to RAM that is actually enabled, that is, have the chip selects been set up. 2. Old versions
Jim Hill/ABS is out of the office.
2003-07-18 by jlhill@AircraftBraking.com
I will be out of the office starting 07/17/2003 and will not return until 07/21/2003. I will respond to your message when I return.
Jim Hill/ABS is out of the office.
2003-07-18 by jlhill@AircraftBraking.com
I will be out of the office starting 07/17/2003 and will not return until 07/21/2003. I will respond to your message when I return.
[68300] Re: Are BDM wigglers x86 PC only?
2003-07-18 by Scott Newell
... I m not sure how much direct access you have the the parallel port signals on say, an SGI Octane running IRIX. Even if you wanted to write an IRIX driver
Jim Hill/ABS is out of the office.
2003-07-17 by jlhill@AircraftBraking.com
I will be out of the office starting 07/17/2003 and will not return until 07/21/2003. I will respond to your message when I return.
Re: [68300] Are BDM wigglers x86 PC only?
2003-07-17 by Scott Newell
... Really? I didn t have too much trouble getting RTEMS (partially) up on a Vesta 332 based board...but I did cheat and use SingleStep for downloading
Downloading S2 using ICD32 BDM
2003-07-17 by remkomg77
Hi all, I am having some big dificulty downloading my s2 rec to my development board using pemicro s ICD32 debugger. It says it s loading the file but it
Re: Are BDM wigglers x86 PC only?
2003-07-17 by Aaron J. Grier
... with GNU, so you re contractually obligated to have the source and do with it as you please within the bounds of the GPL. provided such a platform has a
Re: [68300] Are BDM wigglers x86 PC only?
2003-07-17 by Andrei Chichak
An interesting idea. As a part of the EFI332 effort, I will say that gcc/gdb has proved to be a real PITA to crack. Even if you go half way and install CYGWIN,
Jim Hill/ABS is out of the office.
2003-07-17 by jlhill@AircraftBraking.com
I will be out of the office starting 07/17/2003 and will not return until 07/21/2003. I will respond to your message when I return.
Are BDM wigglers x86 PC only?
2003-07-17 by Scott Newell
Will the common low-end parallel port BDM units work on anything other than an x86 based host PC? I ve noticed that SingleStep is available for unix, but I ve
RE: [68300] IRQ7 acting odd
2003-07-16 by Andrei Chichak
Dimiter, You bring up a VERY good point, if the RTC asserts its interrupt line while the system is off (which it can do), when the system boots the boot code
RE: [68300] IRQ7 acting odd
2003-07-16 by Dimiter Popoff
Andrei, ... the only chance you might have to clear the non-maskable IRQ is to do so by the very first instruction in the NMI handler. Most likely you won t
RE: [68300] IRQ7 acting odd
2003-07-16 by Andrei Chichak
Everyone, thank you very much for your help. it works great. Andrei ... Andrei Chichak #200 10835-120 Street Senior Software Developer
RE: [68300] IRQ7 acting odd
2003-07-16 by Melear Charles-rdph40
If you don t generate an AVEC signal from some source, the &*%$$^&&$#^&@ thing ain t going to work. Charlie ... From: Andrei Chichak
RE: [68300] IRQ7 acting odd
2003-07-16 by Melear Charles-rdph40
Hello everyone, Interrupt Acknowledgement Cycles always drive the address bus to $FF FFFx. Programming the Base Address register to $FFF8 will give the
RE: [68300] IRQ7 acting odd
2003-07-16 by Melear Charles-rdph40
Hello everyone, When an interrupt occurs, the following happens: 1. some stuff is put on the stack 2. the interrupt acknowledgement cycle occurs 3. either
RE: [68300] IRQ7 acting odd
2003-07-16 by Andrei Chichak
Okay, the programming of CS6 (as it happens, this was the next open CS) to the values that Brian Geery gave ( $FFF8 to CSBAR6 & $6B81 to CSOR6 ) actually
RE: [68300] IRQ7 acting odd
2003-07-16 by Scott Newell
... I ve never used anything other than autovector interrupts, so I m not really sure. I would have guessed (and this is just a guess) that it would have
RE: [68300] IRQ7 acting odd
2003-07-16 by Andrei Chichak
Brian and Scott, Would this prevent the interrupt from firing in the first place? (I m not avoiding trying out the extra chip select setup, I m just waiting to
RE: [68300] IRQ7 acting odd
2003-07-16 by Geery, Brian
Andrei, You re not the only one to get confused on this, but you do need to program one of your chip selects to interrupt acknowledge. I like using Chip
RE: [68300] IRQ7 acting odd
2003-07-16 by Scott Newell
... I think so too...either tie the /AVEC pin low or use a chip select to generate the /AVEC signal internally. ... As I understand it, the term autovector
RE: [68300] IRQ7 acting odd
2003-07-16 by Andrei Chichak
Good morning Scott, Sheldon, Brian, Charlie, and everybody else, I think that I am missing something here, and I think it has a lot to do with AVEC and DSACK.
RE: [68300] IRQ7 acting odd
2003-07-16 by Melear Charles-rdph40
Andret, The CPU32 is very good about giving stack information. When the machine takes a double bus fault, there will be a lot of information put on the stack.
RE: [68300] IRQ7 acting odd
2003-07-16 by Melear Charles-rdph40
Hello everyone, Now before I start, let me tell you that all I know about C is that it means yes in Spanish. Something that you need to know about interrupts
RE: [68300] IRQ7 acting odd
2003-07-16 by Geery, Brian
Andrei, Did you program one of your chip selects to act as your interrupt acknowledge? Brian ... From: Andrei Chichak [mailto:acpmiedm@telusplanet.net] Sent:
Re: [68300] IRQ7 acting odd
2003-07-16 by Sheldon Black
Hello Andrei, It has been a couple of years since my SDS 68332 work, but I had a line in my SDS config file that looked like: set vectskip=28,64,66 The file,
Re: [68300] IRQ7 acting odd
2003-07-15 by Scott Newell
... Have you examined the signal with a scope? ... Are you autovectoring? /AVEC tied low, or using a chip select? ... properly. Hmm...can you separate the
IRQ7 acting odd
2003-07-15 by Andrei Chichak
Hi all, I have a Benchmarq bq4842y battery backed ram RTC chip with INT* tied to IRQ7* directly (no pullup). I have programmed PFPAR with a value of 0x80. DDRF
RE: [68300] PE6
2003-07-15 by Melear Charles-rdph40
Hello everyone, All of the configuration pins on the MC68332 are Data Bus pins. One of these pins controls port E and another controls port F. If Data Bus 8
PE6
2003-07-15 by Rod.Niner@gsescales.spx.com
On the 68332, Port E bit 6 has an alternate function of SIZ 0. I seem to remember issues with using this pin regarding startup. It will function as Siz0
Re: [68300] Mask change
2003-07-03 by Scott Newell
... How funny...I just got a stack of boards in from one of our turnkey assembly houses, and sure nuff, they re the new J66A mask parts. They ve all tested
RE: [68300] Mask change
2003-07-03 by Melear Charles-rdph40
Hello everyone, I don t know the answer but my guess is that there were minor process variations that required a new mask. I have looked in the data base
Re: [68300] Mask change
2003-07-03 by Andrei Chichak
... From: http://e-www.motorola.com/collateral/PCN8158.htm Motorola is pleased to announce the successful qualification of the following devices, transferred
Mask change
2003-07-03 by Rod.Niner@gsescales.spx.com
I have received notice that a mask change has occurred on the 68332 from AJ30C to 1J66A . Does anyone know what changes have occurred. It would appear that
RE: [68300] Connecting to 332
2003-06-19 by Scott Newell
... I ve had good luck with the Microchip MCP130 series and the Dallas/Maxim DS1811. I have an older design using a MAX691, but that might be marginal at
RE: [68300] Connecting to 332
2003-06-19 by Godiska, Jim
Hello all, I just have three notes for those interested in the 683xx reset. 1. The manuals for this family (or at least the 68376 that I use) recommend a
RE: [68300] Connecting to 332
2003-06-19 by Melear Charles-rdph40
Newell, 10 - 4. I posted another message whinning about the pull-up. As I say, no pull up -- no work. If the original poster of the message about the reset
RE: [68300] Connecting to 332
2003-06-19 by Melear Charles-rdph40
Hello everyone, The reset pin of the 683xx family is not really made to be driven by a totem-pole type driver that is used by the Maxim part you mentioned.
RE: [68300] Connecting to 332
2003-06-19 by Shyam mali
The reset line of the 332 is tied to the MAX707 through a 4k7 series resistor. The design is proven, this board ain t. I tried second board of the same batch
RE: [68300] Connecting to 332
2003-06-19 by Allen Nance
Shyam: I had the same type of problem when I tried to add some filtering to the reset line. The most capacitance I could add was .001uF. Otherwise the reset
RE: [68300] Connecting to 332
2003-06-18 by Scott Newell
... Don t you mean Shyam Mali?--I m not the original poster, I was replying to the original poster. I m betting on the missing reset line pullup too. newell
RE: [68300] Connecting to 332
2003-06-18 by Melear Charles-rdph40
Scott, I have seen the exact waveform you are describing. Here is how a Power ON Reset sequence works. 1. Reset is asserted low from the application of