Re: [lpc2000] Jtag for arm!!
2005-11-08 by Doug Sutherland
http://groups.yahoo.com/group/lpc2000/files/JTAG/
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2005-11-08 by Doug Sutherland
http://groups.yahoo.com/group/lpc2000/files/JTAG/
2005-11-08 by rtstofer
Here is one: http://www.olimex.com/dev/pdf/arm-jtag.pdf
2005-11-08 by Diego Stefanello
Hello guys. I m initiating the study about ARM and I would like to know where to find a Jtag schematic for arm debugger. Tks Diego
2005-11-08 by rtstofer
... FPGA ... LPC ... voltage ... The datasheet, in section 8 table 9 lists the range of voltages as: VDD1.8 1.65V MIN, 1.8V, 1.95V MAX VDD3.3 3.0V MIN, 3.3V,
2005-11-08 by Leon Heller
... From: pfwilliamsmts To: Sent: Tuesday, November 08, 2005 6:33 PM Subject: [lpc2000] Can I run the core
2005-11-08 by Mark Butcher
Hi and thanks for the tips. It seems as though the simplest method to get the code working as I want it is to move to the Windows Sockets 2 API and use the
2005-11-08 by pfwilliamsmts
I am starting a new design with the LPC2106. I will also have an FPGA running at 1.5 volts. I would like to use the 1.5 volts for the LPC core voltage. The
2005-11-08 by rtstofer
... vs. PDF). ... A while back I wanted to download the C standard. It seems I would have to pay for it. The C++ standard was free (or cheap) so I grabbed it
2005-11-08 by Tom Walsh
... -- Tom Walsh - WN3L - Embedded Systems Consultant http://openhardware.net, http://cyberiansoftware.com Windows? No thanks, I have work to do...
2005-11-08 by Tom Walsh
... Exactly, ARM instructions _always_ are 32bits long. That includes the operation code and operands. An X86 or 68K processor uses variable lenght
2005-11-08 by bdmlpc
... You can use 8bit access to 32bit memory, but some registers don t like it. The compiler only sees some memory in which registers are mapped. The compiler
2005-11-08 by David Hawkins
... Hi Eric, If the board has the serial port available, then yes you should be able to talk to the processor over the serial port - but only once it is
2005-11-08 by rtstofer
All, I have been trying to follow the issue of the code generation for the typedef. So, I tried it for setting 3 of the bits; the two least significant and
2005-11-08 by Mark Norton
Tom, Are you saying that with the (packed) attribute, the compiler will treat the number as 16bits where given the orginal poster s definition the struct would
2005-11-08 by Александр Борисов
You are wrong, I can acknowledge one s mistakes :-) About user name - please see e-mail, not user name. It s code page error of web interface of my mail
2005-11-08 by Peter Homann
Hi, Just thought I d ask if anyone has done the following. FreeRTOS has a demo application for the Keil MCB2100 board, that compiles with the Keil compiler in
2005-11-08 by Onestone
Paul you should know by now that you ll never make Alex happy. he thinks the way he expects things to work IS the standard. Anything outside of that is a bug.
2005-11-08 by Tom Walsh
... Okay, while washing some dishes in the kitchen, I finally realized that you skipped ahead to blame the compiler and were convinced that your code is
2005-11-08 by Александр Борисов
... Thank you for my education ... Is this open or closed report? ... I only draw attention on some peculiar properties of Crossworks port of gcc. I reconsider
2005-11-08 by Paul Curtis
Hi, ... Yes, it *does* matter. The only *correct* usage when defining a bitfield is to use int or unsigned int -- if you use unsigned long or unsigned char
2005-11-08 by Александр Борисов
... #define __REG32 unsigned long I only declare bit field. I can use uchar, or uint, it does t important for bit field declaration Any questions?
2005-11-08 by ????????? ???????
Sure, I know about such abstract like mask . But maybe I want to use struct... Regardless of this, thank you for your answer.
2005-11-08 by 42Bastian Schick
Just a quick note: Sciopta RTOS + TCP/IP + Webserver is about 63k with gcc and 59K with ARM RVCS (Thumb). -- 42Bastian Schick
2005-11-08 by 42Bastian Schick
Hi, just a test, if my mails go thru -- 42Bastian Schick
2005-11-08 by brendanmurphy37
At the risk of adding yet more controversy to what is getting to be a somewhat heated discussion, can I suggest that access to hardware registers is best done
2005-11-08 by ????????? ???????
On Tue, 08 Nov 2005 04:47:49 -0500 ... What you mean? I think it obviously, that it s really fault of compiler. I explain my point of view to Paul
2005-11-08 by Александр Борисов
On Tue, 8 Nov 2005 09:08:29 -0000 ... We discuss not any abstract ISO C compiler, but _C_compiler_for_ARM_core. So, do you agree, that my _C_code_ correct? My
2005-11-08 by 42Bastian Schick
Tom ... Slight correction (I ve been corrected before myself): -- openes the signature not -- ^ SPACE -- 42Bastian Schick
2005-11-08 by Tom Walsh
... He didn t understand what it was that he wrote so how can he answer that question? TomW ... -- Tom Walsh - WN3L - Embedded Systems Consultant
2005-11-08 by Tom Walsh
... Oh, well, convention has been to use a string of = , a string of dashes - has a meaning for some mail clients. The braces also confuse things as they
2005-11-08 by Sten
... This behaviour is not bug, it s really a feature. GCC is optimizing the accesss to this bit-field to a minimum. Loading and storing only _one_ byte for
2005-11-08 by Tom Walsh
... You are very very confused... You have absolutely no idea what __REG32 MR0I :1 means, do you??? It is obvious that you are operating under some other
2005-11-08 by 42Bastian Schick
Jonathan ... For the ease of use, I d get one with onboard JTAG emulator or which comes with a dongle JTAG emulator (Ashling, IAR). ... The first is a specific
2005-11-08 by Paul Curtis
Alex, ... So what? It might not be what you want, but it is not incorrect according to the ISO standard. ... Sure, GCC knows about alignment. But you are now
2005-11-08 by Александр Борисов
... I tried to explain my point of view in other mail. The generated code works incorrectly because it use BYTE instructions. You can compile it, load into the
2005-11-08 by Matthias Hertel
I would recommend http://www.keil.com/mcb2140/ This board provides USB, MMC Card slot, 512Kbyte Flash on-chip, 2 UARTs, JTAG, Speaker, a couple of ADC inputs
2005-11-08 by ????????? ???????
On Mon, 07 Nov 2005 21:05:46 -0500 ... It s only for code separation in this mail :-)
2005-11-08 by ????????? ???????
Yes, I mean exactly this!! Crossworks GCC compiler works with bit fields of structures using byte instructions. So if you access to the VICIntSelect (if it
2005-11-08 by vineet jain
Hi, There are no overlapping memory addresses of RAM and ROM like in 8051. Here the address space is linear. You ll know your memory layout once you look at
2005-11-08 by Jonathan Khoo
Hi guys, I am looking to get an arm dev. board for educational purposes. Which do you guys recommend?? What s the difference between Philips LPC2214 and LP2000
2005-11-08 by vaneenbergen
That the first bit of the second byte also changed is very possible. This is de to the processor. The timer register should be handled in a 32 bit access. this
2005-11-08 by Dan Beadle
The basic cause of this error is having an program fetch that is not aligned on a multiple of 4. (the 241H in your example). So how did you do this? This can
2005-11-08 by embeddedjanitor
... deal ... interworking a ... regardless. ... AT91SAM7 ... at ... ability. ... right ... Yup I agree with your basic strategy. If it ain t broke... :-). The
2005-11-08 by Tom Walsh
... Doing the Internetworking is a new thing for me, newlib and gcc were at odds with each other over thumb code linking so I removed the ability. I ve got a
2005-11-08 by Tom Walsh
... The only thing I am curious about is why you bounded your struct def inside a double code block? TomW -- Tom Walsh - WN3L - Embedded Systems Consultant
2005-11-08 by Charles Manning
... What instruction was this accessing? The following things can give you non-aligned accesses: 1) Trying to read a U32 on a non-4-byte boundary or a U16 on a
2005-11-08 by Tom Walsh
... Huh? I only see the LSB getting changed, where do you see a second byte involved?? _ldrb_ and _strb_ are byte operations, not word ops. You got what you
2005-11-08 by Tom Walsh
... You can run into this when mixing Thumb with ARM code. When interrupt routines are entered, the processor is in ARM mode, either write your handlers in ARM
2005-11-08 by Paul Curtis
Alex, ... And you tell me *why* this is incorrect code generation? You might not like what is generated, but is is *not* incorrect according to the standard.
2005-11-08 by Tom Walsh
... I built my newlib with some Makefile options that I edited in after the configure: CFLAGS_FOR_TARGET = -O2 $(CFLAGS) -DREENTRANT_SYSCALLS_PROVIDED