LPC2214 Questions.
2004-07-13 by Lasse Madsen
Hi All While waiting for my LPC2106 board to arrive (Thanks for all the help on my former topic around the LPC2106 processor!!!) I m now very interessted in
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2004-07-13 by Lasse Madsen
Hi All While waiting for my LPC2106 board to arrive (Thanks for all the help on my former topic around the LPC2106 processor!!!) I m now very interessted in
2004-07-13 by bobi catorski
Hi All Has any one using IAR 4.10(and up) with the macrigor wiggler ? I have tray it and get lot s of ERROR. I have also try it with the crossworks for arm
2004-07-13 by microbit
Thanks Andreas ! Too many things to look at all at the same time :-) B rgds Kris ... From: haack0815 To: Sent:
2004-07-13 by philips_apps
Hello Robert and group, we used different devices of the LPC2000 family and different startup times / sequences and did not see any dependence which power was
2004-07-12 by Robert Adsett
There is an opportunity here for Philips to step in if they have found out anything about this. At 01:12 AM 7/12/04 +0000, you wrote: ... Not
2004-07-12 by Shannon Holland
... That s the way SPI works - a byte is received as it sent (as each bit is clocked out, a bit is clocked in). You write a byte to the transmit register, it
2004-07-12 by gregdeuerling
Hello, I have a Maxim thermocouple converter (MAX6675) hooked up to a LPC2294 s SPI. The MAX6675 is SPI read only device, i.e., enable chip select and it
2004-07-12 by Leighton Rowe
Thanks Paul, I wasn t aware of little-endian mode until I was reading large union buffers like: union {char a[32]; short b[16];}; While debugging, the storage
2004-07-12 by Paul Curtis
It s fixed little-endian. No big-endian mode, sorry. -- Paul.
2004-07-12 by Leighton Rowe
I understand that lpc21xx configures arm7 processor to work in little-endian mode. Is it possible to change that around so that the processor works in
2004-07-12 by haack0815
... Hi Kris, take a look at the usermanual(2004-05-03) at page 269. Sorry your bootloader version must be 1.61 or higher. Andreas
2004-07-12 by digtalfreak
I have read that the LPC2119 has 5V tolerant I/O Pins. But the datasheet is confusing me a little bit about the maximum input and output current of the I/O
2004-07-12 by microbit
Hi all, Out of curiousity, I ve put in an ORG directive to place 0x87654321 at address 0x1FC in Flash to see if the code protection works. Reading the code
2004-07-12 by embyy27
... now ... lots of ... Did you ever resolve this problem? What did you find?
2004-07-12 by g2100g
1) Other than the report from Tsvetan (messages 1236/1249/1257), is anyone aware of problems related to Power Supply sequencing or rise times? 2) Is anyone
2004-07-11 by lehighuboy
Frequency: 1 kHz Resolution: 16 bit Channels: 3 My code generates three 16 bit values (0-65535) that are directly proportional to 0-100% duty cycle. The
2004-07-11 by Robert Adsett
... The biggest restriction is that it is protected. The second is that it contains the IAP and ISP support so even if you could erase it you would then have
2004-07-11 by alipowsky
I m trying to setup a failproof flash update method, so an interrupted and incomplete flash update would not force to open the unit and insert a jumper etc. We
2004-07-11 by lehighuboy
I m using the Keil uVision IDE tool and the LPC2129. My question is about setting up single edge hardware PWMs. Someone previously posted the following code:
2004-07-11 by johnthomasedwardtimm
... However, ... receive ... If you set AFMR = 0x03, you can receive all messages. AFMR = 0x03 means that Acceptance Filter is not operational (AccOff) and
2004-07-10 by johnthomasedwardtimm
As mentioned previously, I can of course modify the routine to do something like this: // SendMsg routine If Hardware Transmit Buffer Available (TBS1, TBS2, or
2004-07-10 by johnthomasedwardtimm
I am using Vectored Interrupts. I have enabled the CAN Transmit interrupt to notify me when a transmission was successful so that I can transmit another
2004-07-09 by Robert Adsett
... ... To be fair, they are hardly alone in this. A lot of microprocessor watchdogs allow changing the time period during operation (usually with a
2004-07-09 by embyy27
... 214 ... Not specifically, but you should still need to pay attention to the states of P0.14, DBGSEL, and RTCK during the watchdog reset. ... You should be
2004-07-09 by embyy27
... On the LPC2124, you still need to be sure you have proper levels on P0.14, P1.20, and P1.26. I assume they are sampled on a watchdog reset, just like on
2004-07-09 by Michael Anburaj
Hi, Let me know if you are having problems accessing this link; I can forward you a copy of the latest arm_ucos port. -Mike. ...
2004-07-09 by Robert Adsett
... You mean that the unit was actually erased or programmed? All the serial downloads I ve seen require a reasonably lengthy sequence before you could do
2004-07-09 by Robert Adsett
... Yes some of the registers are only 8 bits wide but the documentation indicates they are accessed as words. It s useful to define them as char for
2004-07-09 by johnnorgaard2003
... I d ... the ... allowed ... do ... try ... long. ... Hej Lasse No all the pointers are long, but what the point to is char, short int or long. See keil
2004-07-09 by Lasse Madsen
Hi John How and why can you make a char pointer to a long address ? #define MAMCR (*(volatile unsigned char *)0xe01fc000) Will writing MAMCR=0x01; make the
2004-07-09 by johnnorgaard2003
... writes so ... fail. I ... nonetheless ... disable ... problem. ... to ... the ... restrictions, ... to ... Hi Maybe the problem is the define of REG. It
2004-07-09 by Leon Heller
... From: gingkotree2004 To: Sent: Friday, July 09, 2004 8:27 AM Subject: [lpc2000] run ucos2 under
2004-07-09 by gingkotree2004
I want to run uCOSII on lPC2104. I can do it with ADS develop tools. Now I want to do it using gnu toolchains under linux. I think someone must have done it.
2004-07-09 by Owen Mooney
Thanks for the various replys on this and I will try them. It may seem like angst over an external pin, BUT I have made one product (with motorola chip) which
2004-07-08 by givc@yahoo.com
Thanx Leighton! ... Flash ... User ... me. ... examples
2004-07-08 by givc@yahoo.com
Hello, I m using the LPC2119 s IAP, and when I use the... iap_entry(command, result); I m experiencing some weird behavior... most of the time when I try to
2004-07-08 by Robert Adsett
Now there is a reason not to bring a pin out. ... I ve already experienced it (not deliberately). An interrupted download must be re-programed by pulling
2004-07-08 by Alex Holden
... No, the ISP uploader program calculates the checksum before uploading the code to the device. Another way of reducing the risk of a partial upload with a
2004-07-08 by Robert Adsett
... ... Another basic question. How do you know you are failing here and not somewhere else? Robert Freedom has no meaning of itself. There are
2004-07-08 by mjbcswitzerland
You re getting me worried.. I also have to support ISP without P0.14 - absolutely no choice and not an issue of saving a pin - it is the fact that the chip is
2004-07-08 by Robert Adsett
... That might be a problem. The pll_load writes must me successive writes so if an interrupt were to occur between writes the update would fail. I think I d
2004-07-08 by shridhar joshi
hi Robert, ... the code. and i am setting the Pll configuration in main which is executed later ... #define REG(addr) (*(volatile unsigned long*)(addr)) ...
2004-07-08 by Robert Adsett
... The one that occurred to me is, since it s already hooked up to the the reset line, it could make a pretty sophisticated application specific watchdog
2004-07-08 by Alex Holden
... You could reduce the failure window by doing a checksum of the entire flash at the beginning of the init code in the first sector, and erasing the first
2004-07-08 by Robert Adsett
... Some basic questions. There are no interrupts enabled? What is the definition of REG (I am assuming that SYSCON... etc are simple numeric constants)? There
2004-07-08 by Robert Adsett
... ... That may work but it puts Fcco out of range which may cause problems. Robert Freedom has no meaning of itself. There are always
2004-07-08 by Robert Adsett
... I don t think that s any more effective than simply erasing the first sector, although it does give it a longer period to run between being made invalid
2004-07-08 by Taner Mutlu
try this... void initCPU(void){ ****************************************************************************** MAMCR = 0x00; MAMTIM = 0x03; MAMCR = 0x02;
2004-07-08 by markcrow
For what it s worth, your code is, as I understand it, by the book as regards programming the PLL. I haven t got it to work either but I AM GETTING A LOCK.
2004-07-08 by Robert Adsett
... OK, that s clearer. Neat parlour trick. I don t know whether to be amused or distressed that it works. It does open up a whole new class of