pll configuration problem
2004-07-08 by shridharjoshi2000
hi all, i am trying to boost the PRocessor clock to near full speed by setting the PLL registers but PLL is not locking . am i making any mistake in
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2004-07-08 by shridharjoshi2000
hi all, i am trying to boost the PRocessor clock to near full speed by setting the PLL registers but PLL is not locking . am i making any mistake in
2004-07-08 by lpc2100
... verify? Re-entry in to bootloader ISP without touching the P0.14 pin when the device already had a valid user code. re_enter_bootloader_isp { volatile
2004-07-08 by Richard
Here s a thought, how about reading sector zero into RAM and erasing the location corresponding to location 0x14 in flash (valid code ID). Then erase sector
2004-07-08 by david_albert@hotmail.com
I have attached the sample. [Non-text portions of this message have been removed]
2004-07-08 by Shannon Holland
... I would agree! I have no angst on this issue, it just seemed like it might be a useful thing which wouldn t be that hard to do from the bootloader side. In
2004-07-08 by Robert Adsett
... Not to pick on you in particular, but this seems an awful lot of angst over bringing out one more connection. If you are going to allow ISP after potting
2004-07-08 by Robert Adsett
... Sorry, I ve lost track somewhere here. What, exactly, did you verify? Robert Freedom has no meaning of itself. There are always restrictions, be they
2004-07-08 by Shannon Holland
... Did you remap memory to put the bootloader back at address 0, or something else? Only thing I would be concerned about is if Philips changed the bootloader
2004-07-08 by lpc2100
The watchdog reset won t work because the bootloader skips P0.14 sampling when WDTOF bit is set as indicated in the bootloader flowchart.
2004-07-08 by lpc2100
The idea here is to fool the bootloader when it samples P0.14. If serial port 0 is used in the application then it also needs to clear the bit 2-3 of PINSEL0
2004-07-08 by Leighton Rowe
How about implementing the watchdog? That s closest thing to a hardware reset (without pressing the switch). You might run into a few issues using the watchdog
2004-07-07 by Richard
Hmmm, Branching to 0x00 is not the same as a reset, IOW you will not end up in the bootloader that samples P0.14 and enters ISP mode etc. Rich ... epoxy. ...
2004-07-07 by lpc2100
Owen Try this sequence from your program which needs to be updated. Make bootloader vectors visible Write 0x0 to the MEMMAP (0xE01FC040) Select P0.14 as
2004-07-07 by Robert Adsett
... Well you are bringing out the serial lines already so that would be just one extra pin on your connector. However, I presume there are reasons you are
2004-07-07 by Owen Mooney
I am building a product that will be encapulated in a blob of epoxy. I live in the real world so I know that with any new product firmware upgrades are almost
2004-07-07 by nedeljkomiljevic
... Hi, I m running it on LPC2106 using GNU/Linux environment. No problems. Mike has done a port: http://www.geocities.com/michaelanburaj There you ll find the
2004-07-07 by gingkotree2004
I want to run uCOSII on lPC2104. I can do it with ADS develop tools. Now I want do it wiht gnu in linux. I think someone must have done it. Where can I find
2004-07-07 by Tutors of ESAcademy
NOTE: I have not tried this, just trying to provide a quick push into the right direction ... ... mode. ... the ...
2004-07-07 by capiman@t-online.de
Hello, i just uploaded a new version of lpc21isp (Version 1.14) to http://www.clibb.de. It contains the following improvements: 1.11 03.04.2004 Small
2004-07-07 by balabh2000
Hi i have been working on the FULL CAN code provided in the files section as an example. I am workin on MCB2100 boards and was wondering if it was possible to
2004-07-07 by philips_apps
Many group members have experimented with the IAP calls to write less than 512 bytes of data. The follwing information and Q&A attempts to address relevant
2004-07-06 by Shannon Holland
... Hmmm, ok - thanks! I will try that. Shannon
2004-07-06 by Jim Beagley
... quirk in ... Work great ever since.
2004-07-06 by Jim Beagley
... Shannon, It made all the difference in mine when I just removed the JCLK pi alltogether. I am using the same setup as you are. One note, I still have to
2004-07-06 by Leighton Rowe
... If you are using IAR Workbench there are a few IAP routine examples provided for you to use. Otherwise, check out this website...it s a start.
2004-07-06 by mjbcswitzerland
... of ... I am using the LPC2106 - is this note valid for this type too? ... I am using a simple external brown-out detector without reset capability (no push
2004-07-06 by capiman@t-online.de
When have you sent it ? To which email address ? I think i haven t received an email about this topic... Regards, Martin PS: I will merge this change in and
2004-07-06 by Leighton Rowe
... doesn t ... and ... permanently ... easiest ... doesn t ... vector ... to the ... I kinda misinterpreted the chksum check process (at reboot) and erasing
2004-07-06 by Robert Adsett
... Oops, that should be I can see that a transmitter FIFO threshold interrupt would be .... Robert Freedom has no meaning of itself. There are always
2004-07-06 by Robert Adsett
... There is no way to know when the transmit FIFO has been partially emptied (well you could time how long it was since it was last filled). The THRE flag
2004-07-06 by hodgejackiehank
... fires ... like ... I would like to be able to top up the FIFO when possible so that I can have more time before the next interupt. Trouble is I am not
2004-07-06 by Robert Adsett
... In this respect, it behaves as all 550s. When the THRE interrupt fires the FIFO is empty and you can put up to 16 bytes into it. Something like case
2004-07-06 by hodgejackiehank
... copy-and-paste ... I thought it might be something like that. So given that the FIFO is preconfigured, how do I know when the FIFO is full?
2004-07-06 by nedeljkomiljevic
Hi all, has anybody tried to put the LPC in power down mode? What would be the proper sequence of putting it into power down mode and wake on external
2004-07-06 by Jens Hildebrandt
... I also stumbled across this description. Obviously, this is a copy-and-paste from the description of the 550-UART IP-Core. So, compile time means the
2004-07-06 by hodgejackiehank
As soon as I write a single character to the THRE, Transmit holding register empty flag in U1LSR is cleared. Either the FIFO is not enabled or is set to 1 ,
2004-07-06 by Alex Holden
... Exactly. If the vector table at the beginning of user flash doesn t checksum correctly, the chip goes into bootloader mode after reset and you can
2004-07-05 by Robert Adsett
... I don t believe the OP is talking about rewriting the bootload sector just the interrupt vector table (which is at the beginning of the flash rather than
2004-07-05 by Leighton Rowe
... your own ... force it ... the ... careful ... the device. That ll be risky business indeed. Luckily, the built-in IAP flash programmer can program anywhere
2004-07-05 by Gus
Hello, Has anyone thought or booted ucLinux on LPC chips? Is this a good idea? what is the limitation? Thanks, Gus
2004-07-05 by Alex Holden
... Just a quick untested idea: I wonder if instead of implementing your own bootloader because P0.14 is physically inaccessible, you could force it to enter
2004-07-03 by Leighton Rowe
... Fair enough...using multiple blocks is worth trying out then. With 16k RAM buffering wouldn t be a problem at all. The ISP on my system is available only
2004-07-03 by Karl Olsen
... possible servicing all of them at same time e.g.. ... Yes, in my program, gcc generated better code for the else if construct, and the interrupts could
2004-07-03 by h s
Some follow up questions? 1) Have you tried the timer interupt at the IRQ levels? 2) Why do you use the else if condition. As compare to going and possible
2004-07-03 by Stephen Pelc
... Our Xmodem system works fine on a 2129 - the hardware/software combination should be available in a few weeks from MPE and New Micros. The software will be
2004-07-03 by Michael Anburaj
Hi Lasse, If you are interested in a Free, yet reliable RTOS check ucos-ii.com & my port for ARM7s/9s is free & is up in the following link, it also includes
2004-07-02 by Robert Adsett
Unfortunately, no-one appears to have seen an obvious problem. :( I ve kept on it and I think I may have found where/when the problem occurs. ... I ve pretty
2004-07-02 by Karl Olsen
... timer0 simultaneously (in the match interrupt mode, while the main timer0 is free running)? ... reloaded at a period rate. The other channels may be
2004-07-02 by Leighton Rowe
I Didn t notice it until now, The same typo in the Philips User Muanual for the LPC2119/2129/2194/2292/2294 (p22-23). Luckily the T0CR3 s defined in the latter
2004-07-02 by cecodere
Greetings, There is a mistake in the Philips User Manual for the LPC2114/2124/2212/2214 (03 May 2004). The TIMER0 mapping (p.21-22) seems to be missing T0CR3.