Re: IDE choice for peripheral support
2006-01-21 by derbaier
You can also get the free H-JTAG from: http://twentyone.blogchina.com That will allow your Wiggler to work with all of the Windows debuggers that supports RDI.
Yahoo Groups archive
Messages
Page 78 of 329 · 16407 messages matched
2006-01-21 by derbaier
You can also get the free H-JTAG from: http://twentyone.blogchina.com That will allow your Wiggler to work with all of the Windows debuggers that supports RDI.
2006-01-21 by Dominic Rath
Hello Dave, ... There is enough information publicly available that would allow you to support RDI, but much of this raises legal questions. H-JTAG is
2006-01-21 by Paul Curtis
Eric, ... RDI is an interface specification from software (e.g. debuggers) to hardware (J-Link, MultiICE, and so on). As such, it is possible to write
2006-01-21 by Dominic Rath
Hello Joel, thanks for the information you dug out. I believe there would be enough information publicly available to build an RDI compatible interface, but
2006-01-21 by brendanmurphy37
Karl, When I said wow! , I meant neat : it s a good solution. As I m sure you ll agree, having to come up with somethinkg like this, or milti-level
2006-01-21 by Joel Winarske
I ve seen limited info posted on this, so for reference: The RDI 1.5.1 header and library files are available under GNU here:
2006-01-21 by embeddedhub
Hi Danish, There is no limitation with the short cable. You could always get a DB25 M/F cable to extend the connection btw ARM-JTAG and your PC. ARM-JTAG works
2006-01-21 by jk jlkj
Hi Vinee, R u by any chance from Bharatividyapeeths college of engineering, Pune. vineet jain wrote: Hello All, I have been working in
2006-01-21 by dr_danish_ali
Sorry folks, I didn t mean to start a flame war about open / closed interfaces. My comment was meant to imply that (afaik) the Keil uLink is only listed as
2006-01-21 by Digital Systems, Partner
PLL settings for power conservation... Thanks a lot to Karl to confirm my assumptions. Warm regards Vimal Amin
2006-01-21 by Eric Engler
... I understand RDI to be the name of the API used by the Segger Jlink DLL on Windows, and not the name of any low-level chip functions? As I understand it,
2006-01-21 by Tom Walsh
... We ve used a front porch , back porch approach sucessfully for many years with RS485 half duplex. The baudrate is 1200buad, so, when the last char is
2006-01-21 by Robert Adsett
... That sound right. There was some discussion here recently about techniques for determining when it was safe to turn the line around. It would be worth
2006-01-21 by Tom Walsh
... There is a lot of information about how serial keyboards operate (XT, AT, PS/2) out there on the net. Just go to google and do a little research. There
2006-01-21 by Karl Olsen
... From: Tom Walsh To: Sent: Friday, January 20, 2006 10:47 PM Subject: Re: [lpc2000] Re: changing PLL
2006-01-21 by Dominic Rath
Hello, ... OpenOCD allows you to specify what reset configuration your jtag interface and your target offers: none, trst only, srst only, srst and trst, and
2006-01-20 by Karl Olsen
... From: brendanmurphy37 To: Sent: Friday, January 20, 2006 4:38 PM Subject: [lpc2000] Re: D/A noise
2006-01-20 by Tom Walsh
... I am also considering varying the clock to save power, won t this raise havoc with the peripherials? AFAICT, the uart baudrate, timer interrupt values,
2006-01-20 by Karl Olsen
... From: Digital Systems, Partner To: Sent: Friday, January 20, 2006 6:42 PM Subject: Re: [lpc2000] Re:
2006-01-20 by Ed Schlunder
The real Wiggler has host control of the TRST. Even if the TAP controller can be reset by a TCK sequence, wouldn t the Macraigor OCDremote software likely
2006-01-20 by Maia
Olá Maurício, Recebi dois recentemente e neles vc perguntava se eu tinha recebido algum e respondi que não. O último que recebi com algum assunto foi em
2006-01-20 by ntfreak2000
The TSRT pin is optional, the jtag cell reset can be obtained by a TCK sequence. Anyway most of the manufactursr eg, philips. ST reset this when the SRST pin
2006-01-20 by Digital Systems, Partner
Thanks Karl. You are right. But there is a bit, PLOCK. I am not very clear about application. Can I do as follows? Disable PLL (Not just switch). I neet to
2006-01-20 by lpc2100_fan
Andy, I was interested in this myself and had the chance to talk to a Philips designer :-)) He did not mention that this would be a hidden feature but it
2006-01-20 by Ed Schlunder
That s what everyone else seems to do... The original wiggler clone schematic had it that way, the Olimex development boards seem to have both pins 1&2 tied to
2006-01-20 by Langosta39
Bob, Hmmm, now that I think about your message I think you are correct. Vbat does maintain the SEC, MIN, HOUR, DOW, DOM, DOY, and etc registers, as well as
2006-01-20 by Langosta39
Hi Bob, Where did you find that the 2101/2/3 have Vbat-backed SRAM? I can t find an indication of that in the 2101/2/3 fact sheet or prelim user s manual.
2006-01-20 by Paulson, David.C (MA)
Small sample quantities are available today. The evaluation board is 8-10 weeks leadtime. ________________________________ From: lpc2000@yahoogroups.com
2006-01-20 by Soentgerath, Guido
Hello Ed, just one question: why did you connect pin 2 of the jtag connector with VDD ? Thanks, Guido ________________________________ From:
2006-01-20 by my_cool_nickname@yahoo.com
I m somewhat new to the ARM and lower-level programming, so I have some (rather) basic questions about the UART on the LPC 2214 and then some on our
2006-01-20 by Soentgerath, Guido
Hello Ed, just one question: why do you connect pin 2 of the jtag connector with VDD ? Thanks, Guido ________________________________ From:
2006-01-20 by brendanmurphy37
Wow! that s getting really esoteric! Magnus: Karl is right about the jitter. Even without the delay introduced by the timer register being on the peripheral
2006-01-20 by Soentgerath, Guido
Thanks Tom, Dave, it seems that pin 11 is the RTCK pin. Guido ________________________________ From: lpc2000@yahoogroups.com [mailto:lpc2000@yahoogroups.com]
2006-01-20 by Mauricio Scaff
Sorry about this off topic. Maia, Vc tem recebido meus emails ?
2006-01-20 by Karl Olsen
... Loading from the timer register takes at least 8 clocks since it is behind the APB bridge, a compare takes one clock, and a taken backwards jump takes at
2006-01-20 by Magnus Lundin
Brendan, I m not shure. This should look as follows in pseudo assembler after the timer counter and the D/A adresses are loaded into processor registers: one
2006-01-20 by brendanmurphy37
Magnus, This will certainly give an improvement, but even the shortest possible loop will have a built-in jitter that cannot be removed, particularly if you
2006-01-20 by Karl Olsen
... Not reprogramming the PLL, but you can connect and disconnect it to switch between the crystal frequency and the PLL frequency. This switching can be done
2006-01-20 by Tom Walsh
... It is Pin 11 on the 20 pin connector, 14 pin connector doesn t show any. Myself, I put a 10 pin header on my board and just moved the wires around on the
2006-01-20 by Tom Walsh
... I don t use the RTCK signal. The manual says something about a special cable , they probably added one more wire to the present cable that I have...
2006-01-20 by derbaier
... The Lauterbach Trace32 uses Pin-11 of the 20 pin JTAG connector for RTCK. They have usually been quite good at sticking with ARM s specifications, so that
2006-01-20 by Magnus Lundin
Hi Another way to remove jitter is to read the timer in the interrupt routine and loop on this until a predefined value, the number of clock ticks when there
2006-01-20 by Xtian Xultz
Yes, I am using Windows XP SP2
2006-01-20 by Xtian Xultz
No, it never worked, I tryed to restart and didnt work for me.
2006-01-20 by Xtian Xultz
Thank you Maia, I am working now on Linux (I only open emails in Linux :D ) but as soon as possible I will try to kill the spoolsv.exe process and try
2006-01-20 by Vimal Amin
I need LPC2132 to run @32MHz for 2mSec (my time measurement periode) and then drop speed to 4MHz for 100mSec. This cycle continues forever. Is it possible to
2006-01-20 by brendanmurphy37
Hi, I ll preface these comments by stating I ve limited h/w knowledge, so can t comment on the analog stage. However, I can confirm Karl s observations below
2006-01-20 by Michael Johnson
Hi, Try setting the Parallel Port Sharing target property to be Yes . Regards Michael
2006-01-20 by Leon Heller
... From: lpc_peter To: Sent: Friday, January 20, 2006 7:30 AM Subject: [lpc2000] Re: Problem with Crossworks
2006-01-20 by Soentgerath, Guido
Thank you all for your answers ! By the way, do you know which pin of the jtag connector is used for RTCK ? Tom, is there something in the BDI2000 manual ? Ed,